This thesis presents the design of a low-power, sub-1V, BJT-based temperature sensor. It is based on a capacitively-biased (CB) BJT front-end, in which capacitors are discharged across diode-connected BJTs to obtain proportional-to-temperature (PTAT) and complementary-to-temperature (CTAT) voltages. These voltages are then digitised by a switched-capacitor Delta-Sigma Modulator (DSM), which employs energy-efficient inverter-based amplifiers that can operate from a sub-1V supply. To mitigate the effects of component mismatch and 1/f noise, dynamic error-cancellation techniques such as chopping, auto-zeroing and dynamic element matching are used in both the front-end and the DSM. After a 1-point temperature calibration, the sensor achieves a simulated inaccuracy of ±0.20oC (3σ) over temperatures ranging from -55oC to 125oC. From simulations, it does this while operating from a 0.9V supply and dissipating only 270nW. It occupies an estimated area of 0.09mm2 in a 180nm CMOS process. Compared to previous CB temperature sensors, this design occupies 2.8x smaller area and dissipates 3x less power.