Power Electronics in association with the high voltage technology has the potential to bring out new generation of electrification with well-integrated renewable resources. Various high voltage applications of power electronics include Solid State Transformers (SST), Photovoltaic Inverters (PV), and Shore-to-ship connections. A demand for faster and smarter testing of high voltage components led to the development of an arbitrary waveform generator. It is possible to generate voltage waveforms with varying magnitudes and frequencies using a modular multilevel converter (MMC). Based on the voltage withstand capacity of semiconductor switches and the control complexity of MMCs, the number of levels and maximum voltage at each level in MMC are determined. The commercially available semiconductor switches are capable of withstanding 1.7kV (SiC-MOSFET) and 6.5kV (Si-IGBT). The low current and fast switching requirements of high-voltage (HV) tests argue in favor of SiC MOSFETs.

With the ability to connect commercially available and mature but lower breakdown voltage semiconductor transistors in series, medium-voltage (MV) and high-voltage (HV) converters can be built with a significant reduction in costs. Using the proposed technique, a modular multilevel converter (MMC) can be equipped with a HV switching module. When semiconductor switches are connected in series, the key challenge is to ensure equal voltage sharing in both static and dynamic switching states. There is a clear connection between the asynchronous gate driving signals and the voltage imbalance. Different types of intrinsic and extrinsic capacitive couplings also affect the voltage shared among series-connected SiC MOSFETs. The factors responsible for voltage imbalance are listed below from a dominant influence to a subservient one.
1. Gate delay introduced by the gate driver circuit and associated power supply.
2. Resistance and capacitance to ground introduced by the measurement probes.
3. External capacitance to ground introduced by the heatsink.
4. Parasitic inductance introduced by the interconnects between series-connected devices.
5. Process variation in intrinsic parasitic capacitances.

Stacks of SiC MOSFETs can be controlled synchronously and isolated from the gate driving circuit using a pulse transformer. A common primary winding is made of a HV insulated cable passing through ’N’ toroidal cores carrying ’N’ secondary windings for respective gate terminals of the series-connected SiC MOSFETs.
By resolving the frequency dependency between pulse transformer and stack duty cycle, the proposed technique achieves arbitrary switching function for the series-stack. There are two sets of such pulse transformer arrangements that ensure the fail-safe switching transitions for series-connected SiC MOSFETs. An experimental verification of the proposed technique is performed with a 6kV prototype of five 1.2kV SiC MOSFETs in series. During differential probe measurements across drain-source terminals of the individual series-connected SiC MOSFETs, a significant challenge has been encountered. It is demonstrated that external resistive and capacitive couplings induced by the measurement probes can affect switching function.

The objective of the thesis is partially met, and a low-cost approach to achieve high voltage switching modules with commercially available devices in series connection is proposed. With the conducted research it is possible to build high-voltage isolation between gate driving circuit and series-connected SiC MOSFETs.
The proposed method is an open loop voltage balancing technique which significantly reduces the required number of components by eliminating the need for feedback and its isolation challenge. Furthermore it achieves synchronous switching with the ability to set the duty cycle for the series-connected switch.