A key issue in current quantum computing interfaces is the dense interconnect between electronics at cryogenic temperature (CT) and room temperature (RT). Recently, progress has been made to move more control electronics from RT to CT, reducing interconnect overhead. The next step towards minimal interconnect is a direct wireline interface between RT and CT. This work presents a full­rate 10 Gb/s clock­and­data recovery circuit for a high speed serial link receiver operating at CT.

A novel phase detector is utilized to reduce power consumption by removing the need for both a pulse generator at the input and, a buffer between the phase detector and voltage controlled oscillator. Additionally, a digital delay­locked loop is added to improve the retiming margin, achieving higher jitter tolerance. Implemented in 40­nm CMOS, post­layout simulation shows a core power consumption of 3.89 mW from a 1.1­V supply at 10 Gb/s, producing an rms­jitter of 84 fs and an estimated jitter tolerance
of 1.1 UIpp at 10 MHz.

The development of swarm robotics strives for resilience, a key factor in this is energy supply. Without energy a robot swarm cannot operate, so a self sustaining power management system is of great importance. In this thesis, the design of the power management system control hardware and firmware for the new DeciZebro is discussed. The power flow between the battery and peripherals of the robot will be controlled with safety as a top priority. The firmware of the power system reflects the thinking and being of a real animal in code. When the power system wants to recharge it will tell the brain of the robot to get back to a charging station. In case of an error, a pain signal in the form of an interrupt is send through the nerves of the robot. The firmware and hardware design is done, and several parts of the system have been tested and verified. The prototype PCB is completed, however testing has not yet taken place at the current time.