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BP
B Parhami
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Authored
8 records found
Multilayer VLSI layout for interconnection networks
Conference paper -
CH Yeh
,
EA Varvarigos
,
B Parhami
VLSI layout and packaging of butterfly networks
Conference paper -
CH Yeh
,
B Parhami
,
EA Varvarigos
,
H Lee
RACE: A software-based fault tolerance scheme for systematically transforming ordinary algorithms to robust algorithms
Conference paper -
C-H Yeh
,
B Parhami
,
EA Varvarigos
,
TA Varvarigou
Scalable communication protocols for high-speed networks
Conference paper -
CH Yeh
,
EA Varvarigos
,
B Parhami
,
V Sharma
Efficient VLSI layouts of hypercubic networks
Conference paper -
CH Yeh
,
EA Varvarigos
,
B Parhami
2.5n-Step sorting on nxn meshes in the presence of 0(Vn) worst-case faults
Conference paper -
EA Varvarigos
,
B Parhami
,
CH Yeh
The recursive grid layout scheme for VLSI layout of hierarchical networks
Conference paper -
EA Varvarigos
,
B Parhami
,
CH Yeh
Optimal-depth circuits for prefex computation and addition
Conference paper -
CH Yeh
,
EA Varvarigos
,
B Parhami