8 records found
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RACE: A software-based fault tolerance scheme for systematically transforming ordinary algorithms to robust algorithms
VLSI layout and packaging of butterfly networks
Multilayer VLSI layout for interconnection networks
Optimal-depth circuits for prefex computation and addition
Scalable communication protocols for high-speed networks
2.5n-Step sorting on nxn meshes in the presence of 0(Vn) worst-case faults
Efficient VLSI layouts of hypercubic networks
The recursive grid layout scheme for VLSI layout of hierarchical networks
