8 records found
1
RACE: A software-based fault tolerance scheme for systematically transforming ordinary algorithms to robust algorithms
Multilayer VLSI layout for interconnection networks
Scalable communication protocols for high-speed networks
Optimal-depth circuits for prefex computation and addition
VLSI layout and packaging of butterfly networks
The recursive grid layout scheme for VLSI layout of hierarchical networks
Efficient VLSI layouts of hypercubic networks
2.5n-Step sorting on nxn meshes in the presence of 0(Vn) worst-case faults
