This article presents an energy-efficient dual- RC frequency reference intended for wireless sensor nodes. It consists of a digital frequency-locked loop (FLL) in which the frequency of a digitally controlled oscillator (DCO) is locked to a temperature-independent phase shift derived from two different RC poly-phase filters (PPFs). Phase shifts with complementary temperature coefficients (TCs) are generated by using PPFs made from different resistor types (p-poly and silicided p-poly). The phase shift of each filter is determined by a zero-crossing (ZC) detector and then digitized by a digital phase-domain ΔΣ modulator ( Φ - ΔΣM ). The results are then combined in the digital domain via fixed polynomials to produce a temperature-independent phase shift. This highly digital architecture enables the use of a sub-1-V supply voltage and enhances energy and area efficiency. The 28-MHz frequency reference occupies 0.06 mm2 in a 65-nm CMOS process. It achieves a period jitter of 7 ps ( 1σ ) and draws 142 μW from a 0.9-V supply, which corresponds to an energy consumption of 5 pJ/cycle. Furthermore, it achieves ±200 ppm inaccuracy from −40∘C to 85 ∘C after a two-point trim.

Wireless sensor nodes in battery-powered internet-of-things (loT) applications require a stable on-chip frequency reference with low energy (<10 pJ / cycle) and high frequency stability (below ±300ppm). CMOS RC frequency references are promising due to their low-cost integration and high energy efficiency [1] –[5]. Conventional RC references, however, achieve only moderate accuracy (a few %) due to the large temperature coefficient (TC) of on-chip resistors [3]. First-order TC compensation can be achieved by combining resistors with complementary TCs [1], [2]. Although this is energy efficient (<6 pJ / cycle), it only partially compensates for the resistors’ high-order TCs, limiting the resulting accuracy to about ±500 ppm. Better accuracy (±100 ppm [4]) can be achieved by using the output of a digital temperature sensor (TS) to perform a polynomial correction of the phase-shift (μp,T) of an RC filter (Fig. 31.2.1). Alternatively, the phase-shifts (μp. and μN) of two RC filters with complementary TCs can be linearized (Tp. and T N ) and combined in the digital domain. Such dual-RC frequency references can also achieve good accuracy (±200 ppm [5]). However, both architectures employ an analog phase-domain ΔΣ modulator (Φ−ΔΣM) for each RC filter, which consumes significant energy (25pJ/cycle [4] and 107pJ/ cycle [5]) and area (0.3mm2[4]. and 1.65mm2[5]).