Simulating the quantum properties of superposition and entanglement can be highly inefficient with digital computers. To allow for exploration and verification of complex quantum systems, a new tool must be developed. Quantum computers, leveraging discrete operations and error correction, offer potential speedups in factoring, unsorted database search and machine learning as well. However, quantum computers rely on large numbers of qubits that can be controlled with high accuracy to outperform classical computing and key challenges include managing interconnects, achieving uniformity and maintaining isolation from the environment.

Semiconductor spin qubits are promising because of their affinity for mass production and small footprint. However, a statistical understanding of the devices and materials is needed to ensure sufficient yield, which requires high measurement throughput. Additionally, the number of quantum dots per device must increase, transitioning from small linear systems to large 2D architectures which can support the millions of qubits required for fault-tolerant quantumcomputing.

Measurement throughput can be enhanced by mitigating bottlenecks in the feedback cycle through the development of a cryogenic multiplexing platform, using commercial off-the-shelf CMOS for sub-kelvin temperature measurements. This approach increases the number of wires available at cryogenic temperature, enabling efficient statistical characterization of mobility and percolation density in natSi/SiGe heterostructure Hall bars fabricated in an industrial CMOS fab.

The increased throughput enables systematic studies of performance-critical device parameters. Activation energy measurements reveal that conduction band valley energy splitting increases linearly with magnetic field but is independent of Hall density. Instead, it depends on incremental density changes across quantum Hall edge strips, aligning with theoretical predictions for a near-perfect Si quantum well top interface. By combining multiplexing with a crossbar architecture that offers quadratic scaling of unit cells with cryogenic interconnects, 648 narrow-channel field-effect transistors on an industrial 28Si-MOS stack are measured at 100% yield. The device scale allows for comparison between macroscopic pinch-off differences across the crossbar and local differences within each unit cell. These distributions can be converted to energy using addition voltages and compared to proposed 2D architecture uniformity requirements. Additionally, unit cell geometry variations can be used to characterize the impact of device design compared to intrinsic material stack variance.

Finally, the conclusion highlights how advances in this thesis contribute to both the quality and quantity of quantum devices, necessary for future quantum computers to solve real problems. Quality can be further improved with high throughput characterization of efficient measurement structures, using statistical data to deepen understanding viamodeling and exploration of alternative material stacks like Ge/SiGe heterostructures. Increasing quantity calls for further system integration and industry participation.