12 records found
1
Customisation of on-chip network interconnects and experiments in field-programmable gate arrays
IP-XACT Extensions for Reconfigurable Computing
Flexible pipelining design for recursive variable expansion
Efficient hardware generation for dynamic programming problems
Optimal loop unrolling and shifting for reconfigurable architectures
System-level design space exploration of dynamic reconfigurable architectures
Loop unrolling and shifting for reconfigurable architectures
Design trade-offs in customized on-chip crossbar schedulers
System-level dynamic exploration and mapping for dynamic reconfigurable system
Loop optimizations for reconfigurable architectures
Systematic customization of on-chip crossbar intervconnects
Customizing reconfigurable on-chip crossbar scheduler
