This paper presents preliminary results of Plastic-Net, a custom FPGA interconnect architecture designed for high-processing applications that communicate extensively among multiple FPGAs. PlasticNet allows the interconnection of processing nodes (PNs) through a flexible, reliable and efficient custom protocol, that can be easily integrated in High-Level Synthesis (HLS) modern design environments. The system is evaluated on a ZedBoard Zynq®-7000 ARM/FPGA SoC Development Board, including criteria such as overhead, area, worst-case packet delivery latency and bandwidth. The best evaluated case achieved a half-occupancy latency of 16.9μs. The results show the potential of PlasticNet as an efficient solution for low latency multi-FPGA interconnection.

This work proposes a hardware performance-oriented design methodology aimed at generating efficient high-level synthesis (HLS) coded data multiprocessing on a heterogeneous platform. The methodology is tested on typical neuroscientific complex application: the biologically accurate modeling of a brain region known as the inferior olivary nucleus (ION). The ION cells are described using a multi-compartmental model based on the extended Hodgkin-Huxley membrane model (eHH), which requires the solution of a set of coupled differential equations. The proposed methodology is tested against alternative HPC implementations (multi-core CPU i7-7820HQ, and a Virtex7 FPGA) of the same ION model for different neural network sizes. Results show that the solution runs 10 to 4 times faster than our previous implementation using the same board and closes the gap between the performance against a Virtex7 implementation without using at full-capacity the AXI-HP channels.