Passivated contact based on a thin interfacial oxide and a highly doped polysilicon layer has emerged as the next evolutionary step to increase the efficiencies of industrial silicon solar cells. To take maximum advantage from this layer stack, it is vital to limit the losses at the metal polysilicon interface, which can be quantified as metal polysilicon recombination current density (J _0met) and contact resistivity. In cell concepts, wherein a large variety of silicon substrate surface finish can be obtained, it is essential to know how the surface finish affects the J _0met and contact resistivity. Herein, commercially available fire through silver paste and the metal-polysilicon recombination current densities and contact resistivity are used for three different silicon substrate surface finishes, namely: planar or saw damage etched (SDE), chemically polished in acidic solution and alkaline pyramidal textured. Contact resistivity values below 3 mΩ cm² with J _0met in order of the recombination current density of the doped region (J _0pass) are obtained for samples with planar surface for both 150 and 200 nm n⁺ polysilicon layer thicknesses. The results presented in this work show that the samples with flat substrate morphology outperform the samples with textured surfaces.

We have metallised n+ polysilicon passivated layer structures deposited by Low Pressure Chemical Vapor Deposition (LPCVD) with silver pastes. We analysed recombination at the metal contacts by photoluminescence imaging of metallised lifetime samples and found for the best paste, metal semiconductor recombination current density values (J0met) below 70 fA/cm², with contact resistivity below 2 mΩcm². To our knowledge, these are among the lowest values reported so far for full size M2 wafers with 150 nm thin polysilicon layer and wet chemical thin oxide. We also studied the effect of the peak firing temperature on the J0met and contact resistivity in this work. Further, we performed Scanning Electron Microscopy to further understand the silver polysilicon interface.

This work investigates how the thickness of the polysilicon layer and temperatures during contact sintering influence the properties of SiO_x/polysilicon passivated contacts. The n⁺ polysilicon layers deposited by low-pressure chemical vapor deposition (LPCVD) on top of a thin wet chemically grown interface oxide layer providing chemical and field-effect passivation on n-type monocrystalline silicon wafers are investigated. Three different polysilicon layer thicknesses of 50, 100, and 150 nm are considered in this work. A high level of passivation with implied V_oc values above 735 mV and J₀₁ below 5 fA cm⁻² is obtained for symmetric lifetime test samples. These samples are used to investigate the interaction of the silver paste with the polysilicon layer at different fast firing peak temperatures. Reduction in polysilicon layer thickness leads to an increase in contact resistivity as well as in J_0met. Excellent J_0met values of the order of J₀₁ with contact resistivity values below 2 mΩ cm² are obtained for samples with polysilicon layers of 100 and 150 nm thickness.

We have printed firing through silver paste on n+ polysilicon passivated layer structures deposited by Low Pressure Chemical Vapor Deposition (LPCVD). We analysed recombination at the metal contacts by photoluminescence imaging of metallised lifetime samples and found for the best paste, metal semiconductor recombination current density values (J0met) below 100 fA/cm². To our knowledge, these are among the lowest values reported so far for full size M2 wafers with 150 nm thin polysilicon layer. On samples metallised with standard commercial pastes for diffused emitters, we observed higher J0met values, while contact resistivity was acceptable for all samples. We also studied the effect of the peak firing temperature on the J0met and contact resistivity in this work. Further, we compared the impact of deep and shallow doping profiles on the passivation and the J0met values.