Two-dimensional (2D) transition metal dichalcogenides (TMDs) offer a platform for nanoscale electronic devices due to their atomically thin geometry and semiconducting band structure. This thesis investigates the fabrication, assembly, and electrical characterization of TMD-based
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Two-dimensional (2D) transition metal dichalcogenides (TMDs) offer a platform for nanoscale electronic devices due to their atomically thin geometry and semiconducting band structure. This thesis investigates the fabrication, assembly, and electrical characterization of TMD-based field-effect transistor (FET) devices using MoS2, MoSe2, and WS2 flakes. The primary objective is to evaluate how different transfer method and electrode architecture influence the interface quality of the device inturn having a significant impact on the electrical transport behaviour in 2D semiconductor devices.
In this work, the TMD material was prepared using both bottom-up and top-down approaches. For the transfer of the flakes, two different dry transfer techniques were explored involving the use of either only a PDMS stamp or a PC/PDMS stamps. The Device fabrication itself was performed in Kavli Nanolabs, which provided the cleanroom environment for the process. The whole process of the device fabrication process included several steps including substrate cleaning using fuming nitric acid, organic solvent cleaning, resist coating, photolithography or electron-beam lithography, metal deposition, lift-off, and oxygen plasma cleaning. Three main electrode geometries were fabricated in this work, including two-terminal, four-terminal, and interdigitated structures. The electrical contacts consisted of Ti/Au stacks with thicknesses of 5 nm and 30 nm, respectively, deposited by electron-beam evaporation.
Electrical characterization was conducted at room temperature (∼ 300 K) under vacuum conditions, and these measurements included mainly current-voltage (I-V) and gate-sweep measurements, and four probe measurements (V-I). Across the measured devices, the absolute drain currents ranged from approximately 10−12 A to 10−9 A. For the prepatterned interdigitated device incorporating a 2D MoSe2 flake, the total resistance was calculated to be 2.33 × 1011 Ωand the same device architecture with a nanoscroll device exhibited a resistance of 6.91 × 1011 Ω. For the pre-patterned MoSe2 device, the resistance was measured to be 1.62 GΩ, and it displayed p-type semiconducting behaviour; while the pre-patterned WS2 device exhibited a significantly higher resistance of 1.5 × 1012 Ω and it showed n-type behaviour. The subthreshold swing (SS) and field-effect mobility were also extracted for both these two-electrode prepatterned devices. For the MoSe2 device, the SS was calculated to be 6877.7 mV/dec, with a field-effect mobility of 0.0067 cm2 V−1 s−1. For the WS2 device, the SS was 488.1 mV/dec and the extracted field-effect mobility was 4.1 × 10−4 cm2 V−1 s−1. Finally, resistance measurements were performed on a post-patterned WS2 device, yielding a resistance of 1.65 × 109 Ω. This device exhibited ambipolar semiconducting behaviour, with n-type conduction being dominant. The subthreshold swing for electron transport was calculated to be 10726 mV/dec, and the corresponding field-effect mobility was 0.04 cm2 V−1 s−1. Overall, the results indicated a lower resistance for the post-patterned WS2 device compared to its pre-patterned counterpart, but the results are not comparable since the flake geometry, thickness and quality varied between the pre-patterned and post-patterned devices. However, all gate-sweep measurements demonstrated limited electrostatic modulation, characterized by weak on-off ratios and large subthreshold swing values, which is consistent with suppressed carrier injection. The results indicate that electrical transport in the fabricated devices is dominated by several extrinsic factors, including contact resistance, ambient conditions, interfacial contamination, and measurement constraints, rather than intrinsic TMD channel properties. These require future work and optimization.
Overall this work highlights the challenges associated with fabricating and measuring electrical properties of 2D semiconductor devices and provides practical guidance for improving fabrication workflows, interface engineering, and measurement strategies for future exploration of 1-D TMD-based
electronics.