SPAIC: A sub-μW/Channel, 16-Channel General-Purpose Event-Based Analog Front-End with Dual-Mode Encoders

Conference Paper (2023)
Authors

S Narayanan (ETH Zürich, Universitat Zurich)

Matteo Cartiglia (Universitat Zurich, ETH Zürich)

Arianna Rubino (ETH Zürich, Universitat Zurich)

Charles Lego (ETH Zürich, Universitat Zurich)

Charlotte Frenkel (TU Delft - Electronic Instrumentation)

Giacomo Indiveri (ETH Zürich, Universitat Zurich)

Research Group
Electronic Instrumentation
Copyright
© 2023 Shyam Narayanan, Matteo Cartiglia, Arianna Rubino, Charles Lego, C. Frenkel, Giacomo Indiveri
More Info
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Publication Year
2023
Language
English
Copyright
© 2023 Shyam Narayanan, Matteo Cartiglia, Arianna Rubino, Charles Lego, C. Frenkel, Giacomo Indiveri
Research Group
Electronic Instrumentation
ISBN (print)
979-8-3503-0027-7
ISBN (electronic)
979-8-3503-0026-0
DOI:
https://doi.org/10.1109/BioCAS58349.2023.10388815
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Abstract

Low-power event-based analog front-ends (AFE) are a crucial component required to build efficient end-to-end neuromorphic processing systems for edge computing. Although several neuromorphic chips have been developed for implementing spiking neural networks (SNNs) and solving a wide range of sensory processing tasks, there are only a few general-purpose analog front-end devices that can be used to convert analog sensory signals into spikes and interfaced to neuromorphic processors. In this work, we present a novel, highly configurable analog front-end chip, denoted as "SPAIC" (signal-to-spike converter for analog AI computation), that offers a general-purpose dual-mode analog signal-to-spike encoding with delta modulation and pulse frequency modulation, with tunable frequency bands. The ASIC is designed in a 180nm process. It supports and encodes a wide variety of signals spanning 4 orders of magnitude in frequency, and provides an event-based output that is compatible with existing neuromorphic processors. We validated the ASIC for its functions and present initial silicon measurement results characterizing the basic building blocks of the chip.

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