STT-MRAM defect modeling and production testing techniques
S. Yuan (TU Delft - Electrical Engineering, Mathematics and Computer Science)
S. Hamdioui – Promotor (TU Delft - Electrical Engineering, Mathematics and Computer Science)
M. Taouil – Copromotor (TU Delft - Electrical Engineering, Mathematics and Computer Science)
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Abstract
Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) is a promising technology, but its mass production is challenged by manufacturing defects, particularly those introduced during the Magnetic Tunnel Junction (MTJ) fabrication. Traditional testing methods fall short due to unique defect types. This dissertation addresses this by developing effective test and diagnosis methodologies, following a three-step approach: defect modeling, fault modeling, and test generation. It classifies defects into conventional ones (modeled as linear resistors) and unique MTJ defects (modeled using a Device-Aware Test (DAT) method, which this work extends to the Back-hopping (BH) defect). The thesis incorporates MTJ specific behaviors like stochasticity into fault modeling and designs efficient March tests and Design-for-Test (DfT) solutions to ensure high fault coverage. Furthermore, it introduces Device-Aware Diagnosis (DA-Diagnosis) for cost-effective identification of unique defects, demonstrating the practical feasibility of the proposed methodologies through implementation in an STT-MRAM array.