Transistor-level gate modeling for Nano CMOS circuit verification considering statistical process variations

Conference paper (2010)

Authors

Q. Tang Signal Processing Systems - EEMCS
Amir Zjajo Signal Processing Systems - EEMCS
M.R.C.M. Berkelaar Signal Processing Systems - EEMCS
N.P. van der Meijs Signal Processing Systems - EEMCS
Research Group
Signal Processing Systems (EEMCS) (TU Delft)
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Published Date

2010

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Microelectronics

Research Group

Signal Processing Systems