Interfacing with an open-hardware vector network analyser

Bachelor thesis (2024)

Authors

S.P.N. Schaap Electrical Engineering, Mathematics and Computer Science
M.J.A. Langenberg Electrical Engineering, Mathematics and Computer Science

Contributors

G.A. Steele QN/Steele Lab - AS (mentor)
S.N. Haider QCD/Haider Group - QuTech Advanced Research Centre (mentor)
J.S.S.M. Wong Computer Engineering - EEMCS (graduation committee member)
Faculty
Electrical Engineering, Mathematics and Computer Science, Electrical Engineering, Mathematics and Computer Science
More Info
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Published Date

21-06-2024

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Abstract

For microwave qubit readout in research applications, a Vector Network Analyser has been designed. The objective of this project was to design and build a modular, extensible VNA, containing open hard- ware and implemented in open-source software.
This thesis discusses the Python implementation of an interface between the digital signal processing step, taking place inside an FPGA, and the output of data to the user, being in graphical form and as systematical data structure to be stored on a PC. The interface is split up into a server, responsible for communicating with the FPGA on the same chip, and a client, which receives the measurement data from the server via the Transmission Control Protocol and controls the radio frequency signal genera- tors that serve as stimulus for the device under test and as local oscillator for downconversion.
An overview of VNAs and their application in this project is given in the first chapter. The programme of requirements and implementation overview are discussed next, followed by detailed explanations of the Python implementation of the server and client software. The achieved results satisfy the requirements for throughput, extensibility and data transfer overhead time. The thesis concludes with recommendations for future developments and extensions to this project.