Referencing-in-Array Scheme for RRAM-based CIM Architecture

Conference Paper (2022)
Author(s)

Abhairaj Singh (TU Delft - Computer Engineering)

Rajendra bishnoi (TU Delft - Computer Engineering)

Rajiv V. Joshi (IBM Thomas J. Watson Research Centre)

Said Hamdioui (TU Delft - Quantum & Computer Engineering)

Research Group
Computer Engineering
Copyright
© 2022 A. Singh, R.K. Bishnoi, Rajiv V. Joshi, S. Hamdioui
DOI related publication
https://doi.org/10.23919/DATE54114.2022.9774571
More Info
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Publication Year
2022
Language
English
Copyright
© 2022 A. Singh, R.K. Bishnoi, Rajiv V. Joshi, S. Hamdioui
Research Group
Computer Engineering
Pages (from-to)
1413-1418
ISBN (print)
978-1-6654-9637-7
ISBN (electronic)
978-3-9819263-6-1
Reuse Rights

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Abstract

Resistive random access memory (RRAM) based computation-in-memory (CIM) architectures are attracting a lot of attention due to their potential in performing fast and energy-efficient computing. However, the RRAM variability and non-idealities limit the computing accuracy of such architectures, especially for multi-operand logic operations. This paper pro-poses a voltage-based differential referencing-in-array scheme that enables accurate two and multi-operand logic operations for RRAM-based CIM architecture. The scheme makes use of a 2T2R cell configuration to create a complementary bitcell structure that inherently acts also as a reference during the operation execution; this results in a high sensing margin. More-over, the variation-sensitive multi-operand (N)AND operation is implemented using complementary-input (N)OR operation to further improve its accuracy. Simulation results for a post-layout extracted 512x512 (256Kb) RRAM-based CIM array show that up to 56 operand (N)OR/(N)AND operation can be accurately and reliably performed as opposed to a maximum of 4 operands supported by state-of-the-art solutions, while offering up to 11.4X better energy-efficiency.

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