A 200 μA Duty-Cycled PLL for Wireless Sensor Nodes in 65 nm CMOS

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A 200 μA Duty-Cycled PLL for Wireless Sensor Nodes in 65 nm CMOS

Journal Article (2010)

Author(s)

Salvatore Drago (NXP Semiconductors)

Domine M.W. Leenaerts (NXP Semiconductors)

Bram Nauta (University of Twente)

Fabio Sebastiano (TU Delft - Electronic Instrumentation)

Kofi A.A. Makinwa (TU Delft - Electronic Instrumentation)

Lucien J. Breems (TU Delft - Electronic Instrumentation)

Research Group

Electronic Instrumentation

DOI related publication

https://doi.org/10.1109/JSSC.2010.2049458

Wireless sensor networks WSN CMOS Frequency synthesizer Fully integrated Ultra-low-power PLL Duty-cycle Frequency stability

To reference this document use:

https://resolver.tudelft.nl/uuid:4016a62d-9b7f-4d95-9a94-95fb03dee25c

More Info

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Publication Year

2010

Research Group

Electronic Instrumentation

Issue number

7

Volume number

45

Pages (from-to)

1305-1315

Reuse Rights

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Abstract

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