Oscillator based Analog-to-Digital Converter for Action Potential Readout in Microelectrode Arrays

Master thesis (2020)

Authors

N. Baladari Mechanical Engineering

Contributors

V. Valente Bio-Electronics - EEMCS (supervisor 1)
W.A. Serdijn Bio-Electronics - EEMCS (supervisor 2)
R. Dekker Electronic Components, Technology and Materials - EEMCS (supervisor 2)
Faculty
Mechanical Engineering
Copyright: © 2020 Nikhita Baladari
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Published Date

28-08-2020

Language

English

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Faculty

Mechanical Engineering

Abstract

The functioning of the brain depends on the interplay between a large number of neurons. To understand the information processing in neuronal networks, we need tools to record the electrical activity of cells at high resolution. Microelectrode arrays (MEAs) are predominantly used to measure neuronal activity
at high spatial and temporal resolution. With the advent of complementary metal-oxide-semiconductor (CMOS) based MEAs, it has been possible to design high-density MEAs with electrode sizes comparable to that of the individual neurons, allowing sub-cellular resolution. CMOS technology has also facilitated the on-chip signal conditioning needed to record the low-amplitude bio-signals with superior signal quality. In this thesis, a readout architecture for in-vitro MEAs has been proposed for a low-noise extracellular action potential (AP) readout.

One of the challenges in MEA implementation is the design of thousands of low-noise readout channels for simultaneously recording the signals. There is a need to design low-noise ADCs with optimal power and area consumption. In this thesis, a unique low-noise oscillator based sigma-delta ADC has been designed for MEA applications. With the advantages of oversampling and time-encoding techniques, the in-band noise has been optimized, without increased hardware complexity. The simple implementation of this proposed ADC makes it efficient in terms of area and power consumption.

The integrated circuit for this oscillator based sigma-delta ADC has been implemented in 0.18 um CMOS technology to demonstrate the feasibility of high-order oscillator-based ADCs for low-noise extracellular AP readout. It was possible to obtain a noise below 5 uVRMS (simulations) and power consumption under 3 uW using this ADC, which approximately occupies an area of 0.002 mm2. The action potential readout system implemented with this ADC has been taped-out for further analysis through measurements.