A defect-oriented test approach using on-Chip current sensors for resistive defects in FinFET SRAMs

Journal Article (2018)
Author(s)

G. Medeiros (TU Delft - Computer Engineering)

L. M. Bolzani Poehls (Pontifical Catholic University of Rio Grande do Sul)

Mottaqiallah Taouil (TU Delft - Computer Engineering)

F. Luis Vargas (Pontifical Catholic University of Rio Grande do Sul)

S. Hamdioui (TU Delft - Computer Engineering)

Research Group
Computer Engineering
Copyright
© 2018 G. Cardoso Medeiros, L.M. Bolzani Poehls, M. Taouil, F. Luis Vargas, S. Hamdioui
DOI related publication
https://doi.org/10.1016/j.microrel.2018.07.092
More Info
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Publication Year
2018
Language
English
Copyright
© 2018 G. Cardoso Medeiros, L.M. Bolzani Poehls, M. Taouil, F. Luis Vargas, S. Hamdioui
Research Group
Computer Engineering
Volume number
88-90
Pages (from-to)
355-359
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Abstract

Resistive defects in FinFET SRAMs are an important challenge for manufacturing test in submicron technologies, as they may cause dynamic faults, which are hard to detect and therefore may increase the number of test escapes. This paper presents a defect-oriented test that uses On-Chip Current Sensors (OCCSs) to detect weak resistive defects by monitoring the current consumption of FinFET SRAM cells. Using OCCSs, all resistive defects injected in single cells considered in this paper have been detected within a certain accuracy by applying 5 read or write operations only, independent whether they cause static or dynamic faults. The proposed approach has been validated and the detection accuracy has been evaluated. Simulation results show that the approach is even able to detect weak resistive defects that do not sensitize faults at the functional level, thus able to increase the reliability of devices.

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