Design of a Digital Controlled Oscillator for Bluetooth BLE/EDR combo with high tolerance towards AM-FM interference

Abstract

As technology is scaling down by reducing the lateral and vertical dimensions of transistors. It becomes necessary to reduce the supply voltage, enhancing lower power dissipation and to maintain device reliability. This scaling makes the digitally controlled oscillator (DCO) more susceptible to interference between systems on the chip (SoC). For instance, the coupling from the power amplifier(PA) leads to injection pulling of the DCO. Especially in the non-constant envelope modulation schemes, e.g. π/4-DQPSK and DQPSK, the frequency pulling is extremely troublesome causing severe disrupted output spectrum. Now that Bluetooth provides, besides the Bluetooth Basic Rate(BR) also Enhanced Data Rate (EDR) and Bluetooth Low Energy(BLE) a radio with multiple purposes becomes more complex. Especially in the case where EDR uses π/4-DQPSK or DQPSK and the BLE only GFSK modulation. Therefore, in this thesis a dual frequency DCO at 4.8GHz and 9.6GHz is designed to mitigate the coupling issues with the PA. It also includes a study in AM-FM, where an optimal amplitude of oscillation shows minimal variation of frequency. An overall low power is maintained at 1V supply and a current of 308μA and 765μA for BLE and EDR respectively. Moreover, the thesis shows an attempt to leave out the Low Dropout Regulator to address future scaling challenges ahead. The DCO is simulated in 22nm-FDSOI occupying a core area of 0.0543 mm2 and achieves a Phase Noise of -116 dBc/Hz after dividing the frequencies 5.06 GHz and 10.74 GHz into the 2.4 GHz band