An Alternative ADC for MPPT Applications in a PV-PMIC System

A current sampling low power ADC with Non-Linearity Canceling Time-to-Digital Converter

Master Thesis (2025)
Author(s)

R. Mao (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Contributor(s)

WA Serdijn – Mentor (TU Delft - Bio-Electronics)

S. Du – Graduation committee member (TU Delft - Electronic Instrumentation)

Samaneh Babayan Mashhadi – Mentor (Nexperia)

Faculty
Electrical Engineering, Mathematics and Computer Science
More Info
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Publication Year
2025
Language
English
Graduation Date
24-02-2025
Awarding Institution
Delft University of Technology
Programme
['Electrical Engineering | Bioelectronics']
Sponsors
Nexperia
Faculty
Electrical Engineering, Mathematics and Computer Science
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Abstract

The globe is being challenged by growing population and accelerated urbanization, which demands sustainable usage and sharing of resources to create more livable and smarter environments at all scales. To answer those demands, the Internet of Things (IoT) is ultimately a powerful enabler to share resources on a large scale. IoT requires pervasive sensing, which demands a large number of distributed nodes with integrated circuits to collect information. Therefore, Photovoltaic Energy Harvesters (PVEH) have been widely chosen to power IoT nodes, which minimize the maintenance costs. PVEHs are usually managed by Power Management Integrated Circuits (PMIC), also referred to as Photovoltaic cell based PMIC (PV-PMIC). One of the most important feature of PV-PMIC is Maximum Power Point Tracking (MPPT), which ensures the system can output power at Maximum Power Point (MPP). Among various MPPT algorithms, Perturb and Observe (P\&O) is the most popular, which requires measurements of a combination of current and voltage of different nodes or branches, which are analog signals and need to be converted into digital signals. To achieve this analog-to-digital conversion, many ADC and TDC architectures have been proposed, but they are all challenged by power limitation and mismatch and Process, Voltage, and Temperature (PVT) variation. This thesis aims to present the design procedure of a new type of ADC for MPPT structure in a PV-PMIC system. To achieve the objectives, a literature research is carried out, with the research question being 'Which Analog-to-Digital Conversion techniques are suitable for MPPT in a low-power, small-area chip?'. After the literature research, a set of requirements is established and an alternative ADC design is proposed and tested. The proposed design combines capacitive current sampling and a Non-Linearity Canceling TDC. The proposed design is further verified at different levels, including the system level and the circuit level. The final verification includes three tests, namely the Linear Time Response, the Static Response, and the Frequency Response. The obtained results show that the proposed system at the circuit level achieves ENOB=3.97, FoM=4.17 pJ/conv-step, DNL bounded to +-0.8 LSB, and INL bounded to 2.5 LSB. It is further concluded that the proposed system generally meets the requirements. Moreover, the proposed system has unique advantages compared to conventional ADCs for the dedicated MPPT application. Possible future improvements include further improving linearities, designing calibration and trimming methods, and replacing the hard-coded logic with a storage component.

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