A Signal-Dependent Simultaneous Multi-Channel Quantization SAR-RAMP ADC Architecture for Implantable Neurorecording Microelectrode Arrays

Abstract

This thesis explores the design and evaluation of a novel multi-channel hybrid SAR–RAMP analog-to-digital converter (ADC) for high-density neural-recording probes by leveraging the spatial signal correlation between neighbouring channels. Increasing electrode counts in micro- electrode arrays (MEAs) demand compact, low-power signal acquisition. MEArec-generated neural signals were analysed at probe pitches of 10–50 μm, revealing that neighbouring chan- nels in denser arrays often carry overlapping information. Exploiting this property, a hybrid ADC architecture was modelled in Simulink, combining the low-power binary-search algorithm of a successive-approximation register (SAR) with a ramp (RAMP) converter. System-level simulations show that, for 8-bit resolution, the proposed design achieves a 63% reduction in switching activity compared with a conventional RAMP ADC. The 8-bit, 4-channel, 25 kHz sampling-rate (fs) hybrid ADC was implemented and analysed at system level in MATLAB/Simulink, examining the relationship between input signal char- acteristics and ADC performance. Finally, key circuit blocks were implemented in 1.1 V, 40 nm CMOS, including a sample-and-hold stage, a single-ended-to-differential dynamic switching scheme, a strongARM comparator, a binary-weighted CDAC, and the associated digital logic, demonstrating the practical feasibility of the proposed architecture.