A Load Insensitive Doherty Power Amplifier with better than −39dBc ACLR on 2:1 VSWR Circle using a Constant 50 Ω Trained Pre-distorted Signal
Gagan Deep Singh (TU Delft - Electronics)
Dieuwert P.N. Mul (TU Delft - Electronics)
Hossein Mashad Nemati (Huawei Technologies)
M. S. Alavi (TU Delft - Electronics)
L.C.N. de Vreede (TU Delft - Electronics)
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Abstract
This paper presents a low-loss load-insensitive Doherty power amplifier (DPA) technique. The proposed DPA is insensitive to ohmic load variation by adjusting its supply voltages and input drive of the main and peaking stages in a mirrored approach. Moreover, a low-loss tunable matching network (TMN) is employed to cancel out any reactive part of the load. To validate this technique, a printed circuit board (PCB) based demonstrator consisting of the Doherty PA, a six-port reflectometer, and a tunable shunt resonator have been fabricated. When subjected to a 50 Ω load, at the 1 dB compression point, the DPA delivers an output power of 32.3 dBm with a power gain and peak drain efficiency of 14.6 dB and 61 %, respectively. When the DPA is driven with a pre-distorted 64-QAM 4 MHz signal optimized for the 50 Ω loading condition, it delivers 24.4 dBm at 41 % average drain efficiency, with EVM/ACLR −40.9 dB / −46.9 dBc. Subsequently, when subjected to a 2:1 VSWR over a 0°−360° mismatch trajectory, using the unaltered 50 Ω DPD correction, it is capable of delivering an output power of 24.4 ± 0.1 dBm with a 34–39 % drain efficiency while maintaining an EVM/ACLR better than −32.3 dB / −39.3 dBc for all load conditions.