Modeling and Experimental Validation of the Intrinsic SNR in Spin Qubit Gate-Based Readout and Its Impacts on Readout Electronics

Journal Article (2024)
Authors

B. Prabowo (TU Delft - QCD/Babaie Lab, TU Delft - QuTech Advanced Research Centre)

Jurgen Dijkema (Kavli institute of nanoscience Delft, TU Delft - QCD/Vandersypen Lab, TU Delft - QuTech Advanced Research Centre)

X. Xue (Kavli institute of nanoscience Delft, TU Delft - QuTech Advanced Research Centre, TU Delft - QCD/Vandersypen Lab)

Fabio Sebasatiano (TU Delft - Quantum Circuit Architectures and Technology, TU Delft - QuTech Advanced Research Centre)

Lieven Mark Koenraad Vandersypen (Kavli institute of nanoscience Delft, TU Delft - QuTech Advanced Research Centre, TU Delft - QN/Vandersypen Lab)

Masoud Babaie (TU Delft - QuTech Advanced Research Centre, TU Delft - Electronics)

Research Group
QCD/Babaie Lab
To reference this document use:
https://doi.org/10.1109/TQE.2024.3385673
More Info
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Publication Year
2024
Language
English
Research Group
QCD/Babaie Lab
Volume number
5
Pages (from-to)
1-15
DOI:
https://doi.org/10.1109/TQE.2024.3385673
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Abstract

In semiconductor spin quantum bits (qubits), the radio-frequency (RF) gate-based readout is a promising solution for future large-scale integration, as it allows for a fast, frequency-multiplexed readout architecture, enabling multiple qubits to be read out simultaneously. This article introduces a theoretical framework to evaluate the effect of various parameters, such as the readout probe power, readout chain's noise performance, and integration time on the intrinsic readout signal-to-noise ratio, and thus readout fidelity of RF gate-based readout systems. By analyzing the underlying physics of spin qubits during readout, this work proposes a qubit readout model that takes into account the qubit's quantum mechanical properties, providing a way to evaluate the tradeoffs among the aforementioned parameters. The validity of the proposed model is evaluated by comparing the simulation and experimental results. The proposed analytical approach, the developed model, and the experimental results enable designers to optimize the entire readout chain effectively, thus leading to a faster, lower power readout system with integrated cryogenic electronics.