A Compact Sub-1V Capacitively Biased Temperature Sensor in 65nm CMOS

Master Thesis (2025)
Author(s)

G. Chen (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Contributor(s)

K.A.A. Makinwa – Mentor (TU Delft - Microelectronics)

D.G. Muratore – Graduation committee member (TU Delft - Bio-Electronics)

Faculty
Electrical Engineering, Mathematics and Computer Science
More Info
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Publication Year
2025
Language
English
Graduation Date
17-12-2025
Awarding Institution
Delft University of Technology
Programme
Electrical Engineering
Faculty
Electrical Engineering, Mathematics and Computer Science
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Abstract

In this thesis, a low-power, sub-1V, high-accuracy capacitively-biased-diode (CBD)-based temperature sensor with excellent power supply sensitivity (PSS) in a 65 nm LP process is proposed. The sensor consists of two main parts: a CBD front-end and a Delta-Sigma Modulator (DSM). The CBD front-end discharges pre-charged capacitors via diode-connected BJTs to generate accurate proportional-to-absolute-temperature (PTAT) and complementary-to-absolute-temperature (CTAT) voltages. The ratio of these voltages is then digitized by a second-order switched-capacitor DSM, which employs energy-efficient inverter-based amplifiers capable of operating from a sub-1V supply.

After a one-point temperature calibration, the BJT-based sensor achieves a simulated inaccuracy of ±0.2 °C (3σ) over the temperature range from −55 °C to 125 °C. Over the entire temperature range, the BJT-based sensor achieves a PSS of 0.05 °C/V from 0.9 V to 1.4 V. Compared to previous CBD-based temperature sensors, this design achieves 10× better PSS.

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