Design of a pipelined time-to-digital Converter (TDC) suitable for transducer array channel multiplexing

Master thesis (2017)

Authors

L. Wu Electrical Engineering, Mathematics and Computer Science

Contributors

W.A. Serdijn (supervisor 1)
Emil Totev (supervisor 2)
Sotir Ouzounov (supervisor 2)
M.A.P. Pertijs (supervisor 2)
Faculty
Electrical Engineering, Mathematics and Computer Science
Copyright: © 2017 Lichao Wu
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Published Date

18-09-2017

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Abstract

Many fields need high performance time measurements, including particle detection, time-resolved imaging, transducer array channel multiplexing and other time of-flight systems. These measurements are often performed by means of time-to-digital converters(TDCs), that for these applications, require high resolution, accuracy, and throughput. This is often accomplished using conventional custom circuitry, which entails low performance and low flexibility. High performance and low cost TDC architectures have been studied to meet the demands of time measurement.

This thesis presents a new pipelined TDC with 6.4ps resolution, 1.5LSB integral nonlinearity, and a throughput of 200MS/s. A characterization of the TDC is executed and many influences on performance are described, including transistor distortions, temperature effects and process variation. Some directions for future work are presented, with the possibility to improve pipeline TDCs even more. The results of the pipelined TDC shows the standout Figure of Merit(FOM) of 0.01, and can be used in a wide range of applications requiring high throughput and accurate time measurement.