Spin Wave Threshold Logic Gates

Conference Paper (2024)
Author(s)

Arne Van Zegbroeck (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Pantazis Anagnostou (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Said Hamdioui (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Christoph Adelmann (IMEC-Solliance)

Florin Ciubotaru (IMEC-Solliance)

Sorin Cotofana (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Research Group
Computer Engineering
DOI related publication
https://doi.org/10.1145/3611315.3633269 Final published version
More Info
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Publication Year
2024
Language
English
Research Group
Computer Engineering
Article number
31
ISBN (print)
979-8-4007-0325-6
ISBN (electronic)
9798400703256
Event
18th ACM International Symposium on Nanoscale Architectures, NANOARCH 2023 (2023-12-18 - 2024-12-20), Dresden, Germany
Downloads counter
131
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Abstract

While Spin Waves (SW) interaction provides natural support for low power Majority (MAJ) gate implementations many hurdles still exists on the road towards the realization of practically relevant SW circuits. In this paper we leave the SW interaction avenue and propose Threshold Logic (TL) inspired SW computing, which relies on successive phase rotations applied to one single SW instead of on the interference of an odd number of SWs. After providing a short TL inside we introduce the SW TL gate concept and discuss the way to mirror TL gate weight and threshold values into physical phase-shifter parameters. Subsequently, we design and demonstrate proper operation of a SW TL based Full Adder (FA) by means of micro-magnetic simulations. We conclude the paper by providing inside on the potential advantages of our proposal by means of a conceptual comparison of MAJ and TL based FA implementations.