Monolithic 3D Wafer Level Integration

None, None

doi:10.4233/uuid:ca460c12-bf40-4f40-9240-d6c8aa5c37ca

Monolithic 3D Wafer Level Integration

Applied for Smart LED Wafer Level Packaging

Doctoral Thesis (2017)

Author(s)

Z. Koladouz Esfahani (TU Delft - Electronic Components, Technology and Materials)

Contributor(s)

Guo Qi Zhang – Promotor (TU Delft - Electronic Components, Technology and Materials)

H.W. Van van Zeijl – Copromotor (TU Delft - EKL Processing)

Research Group

Electronic Components, Technology and Materials

Copyright

LED System-in-Package 3D wafer-level integration High aspect ratio lithography Multi-step imaging Smart silicon interposer Side-wall photodiode Blue/UV selective photodetector Sensor readout BiCMOS process Wafer-level optic Multidisciplinary simulation Optical simulation

To reference this document use:

https://doi.org/10.4233/uuid:ca460c12-bf40-4f40-9240-d6c8aa5c37ca

More Info

expand_more

Publication Year

2017

Language

English

Copyright

Research Group

Electronic Components, Technology and Materials

ISBN (print)

978-94-028-0513-0

Reuse Rights

Other than for strictly personal use, it is not permitted to download, forward or distribute the text or part of it, without the consent of the author(s) and/or copyright holder(s), unless the work is under an open content license such as Creative Commons.

Files

Master_file_PhD_Thesis_Z.Kolah... (pdf)

(pdf | 15.5 Mb)

- Embargo expired in 19-01-2019

License info not available