RRAM Variability and its Mitigation Schemes
P. Pouyan (TU Delft - Computer Engineering, Universitat Politecnica de Catalunya)
Esteve Amat (Universitat Politecnica de Catalunya)
Said Hamdioui (TU Delft - Computer Engineering)
Antonio Rubio (Universitat Politecnica de Catalunya)
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Abstract
Emerging technologies such as RRAMs are attracting significant attention, due to their tempting characteristics such as high scalability, CMOS compatibility and non-volatility to replace the current conventional memories. However, critical causes of hardware reliability failures (such as process variation due to their nano-scale structure) have gained considerable importance for having acceptable memory yields. Such vulnerabilities make it essential to investigate new robust design strategies at the circuit and system level. In this paper we have first reviewed the RRAM variability phenomenon and the variation tolerant techniques at the circuit level. Then we have analyzed the impact of variability on memory reliability and have proposed a variation-monitoring circuit that discerns the reliable memory cells affected by process variability.