Resistive switching Random Access Memories (RRAM) are being considered as a promising alternative for conventional memories mainly due to their high speed, scalability, CMOS compatibility, Non-Volatile behavior (NVM), and consequent orientation to low power consumption. Advances in the RRAM technology as well as enhancement of the control of the cells are opening the use of these devices for multi-valued logic. But the cycle-to-cycle variability and the still reduced endurance are becoming serious limitations. This paper analyzes the impact of both mechanisms on 1T1R cells and suggests potential adaptive mechanisms to enlarge its lifetime.@en

The decade that we have embarked upon presents enormous challenges for Europe. The 2020 strategy for smart, sustainable and inclusive growth recognises the key role higher education must play if the ambitions for Europe in a fast-changing global reality are to be realised. This implies widening access to lifelong learning to as many European citizens as possible and it is vital that measures are implemented to transform our reality towards this direction. Notably, labour markets increasingly require more graduates with specialized knowledge and competences and substantial investment has to be made in education systems to ensure that this demand is met. The COMPASS project aims to the Composition of Lifelong Learning Opportunity Pathways through Standards-based Services investing on the establishment of a cohesive, strategic partnership for the longterm promotion of LLL-related European strategies and the development of instruments that will raise the awareness of both learning opportunity providers and learning opportunity seekers and stimulate the design of policies for enhancing ET with alternative, flexible pathways on the basis of easy, technology-enhanced access to learning opportunities.@en

The search for alternative memory technologies has attracted significant attention toward emerging non-volatile memories. Among them, STT-MRAM, PCM, RRAM have shown promising characteristic to gain a position inside the memory hierarchy of computing platforms, and even enable new computing paradigms. However like any other emerging technology these devices are affected by concerns to be resolved before they could become a mainstream. This paper reviews the main reliability and testability challenges of aforementioned emerging non-volatile memories and highlights the main future considerations toward them.@en

The need for design of new computing and storage paradigms has leaded to the emergence of new technologies and procedures. Among these technologies, emerging non-volatile memories such as RRAMs are getting intense attention due to their attractive characteristics such as scalability and CMOS friendly manufacturing. However, similar to any other new technology emergences, having reliability and high performance devices is a challenge, and innovative new techniques are required to make the products attractive and robust enough before entering into the semiconductor market. The research for such crucial reliability concerns and mitigation techniques are ongoing hot topic and the main motivation for this work. Therefore, in this paper, we have studied the origins of RRAM variability and reviewed some of the existing techniques to mitigate its effect at circuit level. To show the relevance of variability in RRAM memories we have further analyzed its impact in the Read/Write memory operation and have presented the memory unreliability that we measure by a parameter as probability of error can be 25% during the read operation and in presence of such resistance variations. In the next phase we have presented a conventional 1T1R memory architecture where we have proposed our reconfiguring strategies to extend the memory lifetime. These reconfiguration strategies utilize a monitoring technique, what we have implemented in order to measure the resistance ratios in RRAM memory cells. Such monitoring approach can detect the highly variability effected and differentiate the bad cells from the good cells; therefore, it can improve the overall RRAM memory reliability.@en

The power and reliability issues of today's memories (static and dynamic RAMs) reduce the advances achieved by their implementation in scaled technology. There are several emergent memory technologies that address the technical constraints of today's memories, among which the most promising solutions are the resistance-based memories, such as phase change memories, the redox-based resistive memories, and the spin-transfer torque magnetic memories. These technologies are facing various challenges that have to be addressed to render them efficient in today's applications. Until recently, research focus was on the design for performance and power efficiency, but lately, the test and reliability issues of these devices have become of major concern to the community. This paper presents an overview of the challenges and proposed test and reliability boost solutions developed to suit the needs of the emerging memories under analysis. It underlines (1) the unique faults that occur in the memory cell due to known issues in the emerging storage devices, (2) the dedicated solutions developed for efficient testing of the emerging memories under study, (3) the main reliability concerns related to the emerging storage devices, and (4) the design solutions targeted at mitigating these reliability issues.@en

Memristors are considered a promising emerging device that may improve some specific applications, like memories, or make feasible new ones, mainly alternative computing architectures. However, it is not a mature technology and their characteristics can vary significantly depending on their structures. Also, variability and reliability might suppose an important issue in some applications. In this paper, a chalcogenide memristor is studied and their main parameters are extracted. Then, it's discused how their properties can affect two applications: a memory circuit and a digital computing alternative, the logic implication technique.@en

Emerging technologies such as RRAMs are attracting significant attention, due to their tempting characteristics such as high scalability, CMOS compatibility and non-volatility to replace the current conventional memories. However, critical causes of hardware reliability failures (such as process variation due to their nano-scale structure) have gained considerable importance for having acceptable memory yields. Such vulnerabilities make it essential to investigate new robust design strategies at the circuit and system level. In this paper we have first reviewed the RRAM variability phenomenon and the variation tolerant techniques at the circuit level. Then we have analyzed the impact of variability on memory reliability and have proposed a variation-monitoring circuit that discerns the reliable memory cells affected by process variability.@en