Free-standing, parylene-sealed copper interconnect for stretchable silicon electronics

Conference paper (2008)

Authors

S Sosin Old - EWI Sect. ECTM
T. Zoumpoulidis Old - EWI Sect. ECTM
M. Bartek Old - EWI Sect. ECTM
L Wang Micro and Nano Engineering - Mechanical, Maritime and Materials Engineering
R. Dekker Electronic Components, Technology and Materials - EEMCS
K.M.B. Jansen Computational Design and Mechanics - Mechanical, Maritime and Materials Engineering
L.J. Ernst Computational Design and Mechanics - Mechanical, Maritime and Materials Engineering
Research Group
Old - EWI Sect. ECTM
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Published Date

2008

Language

Undefined/Unknown

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Research Group

Old - EWI Sect. ECTM

Abstract

In this paper, development and characterization of a free-standing electroplated copper interconnect for applications in flexible and stretchable electronics is presented. The copper layer with typical thickness of 5 µm is plated into a photoresist mould realizing meander and mesh-like patterns. These are subsequently released resulting in a free-standing electrical interconnect that is optionally conformally coated by a -8 µm thick Parylene N layer. Parylene sealing provides electrical insulation and increases rigidity of the structures. Tensile tests on fabricated samples have shown the elongation capability up to 300% for the mesh design and more than 1000% for the meander design. The Parylene coated samples showed increased rigidity but about 50% reduced elongation. Furthermore, parameterized FEM simulations were performed in order to estimate stress levels for different geometries under tensile stress.