Free-standing, parylene-sealed copper interconnect for stretchable silicon electronics

Conference Paper (2008)
Author(s)

S Sosin (TU Delft - Old - EWI Sect. ECTM)

T. Zoumpoulidis (TU Delft - Old - EWI Sect. ECTM)

M. Bartek (TU Delft - Old - EWI Sect. ECTM)

L Wang (TU Delft - Micro and Nano Engineering)

R. Dekker (TU Delft - Electronic Components, Technology and Materials)

Kaspar M B Jansen (TU Delft - Computational Design and Mechanics)

L.J. Ernst (TU Delft - Computational Design and Mechanics)

Research Group
Old - EWI Sect. ECTM
More Info
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Publication Year
2008
Research Group
Old - EWI Sect. ECTM
Pages (from-to)
1339-1345
ISBN (print)
978-1-4244-2231-9

Abstract

In this paper, development and characterization of a free-standing electroplated copper interconnect for applications in flexible and stretchable electronics is presented. The copper layer with typical thickness of 5 µm is plated into a photoresist mould realizing meander and mesh-like patterns. These are subsequently released resulting in a free-standing electrical interconnect that is optionally conformally coated by a -8 µm thick Parylene N layer. Parylene sealing provides electrical insulation and increases rigidity of the structures. Tensile tests on fabricated samples have shown the elongation capability up to 300% for the mesh design and more than 1000% for the meander design. The Parylene coated samples showed increased rigidity but about 50% reduced elongation. Furthermore, parameterized FEM simulations were performed in order to estimate stress levels for different geometries under tensile stress.

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