Sintering Process Simulation of Ag Nanoparticles by Phase Field Method

Low-temperature sintering technology of Ag nanoparticles is widely used in high-power electronic device packaging. Utilizing simulation methods to comprehend and control the microstructure and properties of Ag sintering materials has emerged as a prominent research area. This work uses the General Form PDE module in COMSOL to simplify the...

Thermomechanical Oriented Reliability Enhancement of Si MOSFET Panel-Level Packaging Fusing Ant Colony Optimization With Backpropagation Neural Network

Considerable advancements in power semiconductor devices have resulted in such devices being increasingly adopted in applications of energy generation, conversion, and transmission. Hence, we proposed a fan-out panel-level packaging (FOPLP) design for 30-V Si-based metal-oxide-semiconductor field-effect transistor (MOSFET). To achieve...

A Thin and Low-Inductance 1200 V SiC MOSFET Fan-Out Panel-Level Packaging With Thermal Cycling Reliability Evaluation

SiC MOSFET is mainly characterized by the higher electric breakdown field, higher thermal conductivity, and lower switching loss enabling high breakdown voltage, high-temperature operation, and high switching frequency. However, their performances are considerably limited by the high parasitic inductance and poor heat dissipation capabilities...

Copper Nanoparticle Sintering Enabled Hermetic Packaging With Fine Sealing Ring for MEMS Application

Driving by the increased demand for hermetic packaging in the more than Moore (MtM) roadmap, a Cu nanoparticle sintering-enabled hermetic sealing solution was developed with a small-size sealing ring. The developed technology simplifies microfabrication and requires less surface roughness using a sinterable Cu nanoparticle paste. A 50μm size...