Combined Fabrication and Performance Evaluation of TOPCon Back-Contact Solar Cells with Lateral Power Metal-Oxide-Semiconductor Field-Effect Transistors on a Single Substrate

Nowadays, an increasing share of photovoltaic (PV) systems makes use of module- or submodule-level power electronics (PE). Furthermore, PE is used in stand-alone devices powered by PV-storage solutions. One way to facilitate further implementation of PE in PV applications is to integrate PE components into crystalline silicon PV cells. Herein...

Thermomechanical Oriented Reliability Enhancement of Si MOSFET Panel-Level Packaging Fusing Ant Colony Optimization With Backpropagation Neural Network

Considerable advancements in power semiconductor devices have resulted in such devices being increasingly adopted in applications of energy generation, conversion, and transmission. Hence, we proposed a fan-out panel-level packaging (FOPLP) design for 30-V Si-based metal-oxide-semiconductor field-effect transistor (MOSFET). To achieve...

A Thin and Low-Inductance 1200 V SiC MOSFET Fan-Out Panel-Level Packaging With Thermal Cycling Reliability Evaluation

SiC MOSFET is mainly characterized by the higher electric breakdown field, higher thermal conductivity, and lower switching loss enabling high breakdown voltage, high-temperature operation, and high switching frequency. However, their performances are considerably limited by the high parasitic inductance and poor heat dissipation capabilities...

Reverse Recovery Optimization of Multiepi Superjunction MOSFET Based on Tunable Doping Profile

This paper proposes and simulates research on the reverse recovery characteristics of two novel superjunction (SJ) MOSFETs by adjusting the doping profile. In the manufacturing process of the SJ MOSFET using multilayer epitaxial deposition (MED), the position and concentration of each Boron bubble can be adjusted by designing different doping...

Converter Design for High Temperature Superconductive Degaussing Coils

Detection of the magnetic signature of ships can be avoided by using a degaussing system; a set of on-board copper coils that compensates for the magnetic signature. High temperature superconductors (HTS) are currently investigated as a replacement for copper degaussing coils. By using HTS, we have to deal with higher currents and therefore...

Bond Wire Damage Detection Method on Discrete MOSFETs Based on Two-Port Network Measurement

Bond wire damage is one of the most common failure modes of metal-oxide semiconductor field-effect transistor (MOSFET) power devices in wire-welded packaging. This paper proposes a novel bond wire damage detection approach based on two-port network measurement by identifying the MOSFET source parasitic inductance (LS). Numerical calculation...

Characterization and Modeling of Self-Heating in Nanometer Bulk-CMOS at Cryogenic Temperatures

This work presents a self-heating study of a 40-nm bulk-CMOS technology in the ambient temperature range from 300 K down to 4.2 K. A custom test chip was designed and fabricated for measuring both the temperature rise in the MOSFET channel and in the surrounding silicon substrate, using the gate resistance and silicon diodes as sensors,...

Design of a Fan-Out Panel-Level SiC MOSFET Power Module Using Ant Colony Optimization-Back Propagation Neural Network

A new panel-level silicon carbide (SiC) metal oxide semiconductor field effect transistor (MOSFET) power module was developed by using the fan-out and embedded chip technologies. To achieve the more effective thermal management and higher reliability under thermal cycling, a new optimization method called Ant colony optimization-back...

A PoF and statistics combined reliability prediction for LED arrays in lamps

In this work, a physics-of-failure (PoF) reliability prediction methodology is combined with statistical models to consider the interaction between the lumen depreciation and catastrophic failures of LEDs. The current in each LED may redistribute when the catastrophic failure occurs in one of LEDs in an array, thus affecting the operation...

Printed circuit board metal powder filters for low electron temperatures

We report the characterisation of printed circuit boards (PCB) metal powder filters and their influence on the effective electron temperature which is as low as 22 mK for a quantum dot in a silicon MOSFET structure in a dilution refrigerator. We investigate the attenuation behaviour (10 MHz–20 GHz) of filter made of four metal powders with a...

Interface trap density metrology from sub-threshold transport in highly scaled undoped Si n-FinFETs

Channel conductance measurements can be used as a tool to study thermally activated electron transport in the sub-threshold region of state-of-art FinFETs. Together with theoretical tight-binding (TB) calculations, this technique can be used to understand the dependence of the source-to-channel barrier height (Eb) and the active channel area ...

Drain current modulation in a nanoscale field-effect-transistor channel by single dopant implantation

We demonstrate single dopant implantation into the channel of a silicon nanoscale metal-oxide-semiconductor field-effect-transistor. This is achieved by monitoring the drain current modulation during ion irradiation. Deterministic doping is crucial for overcoming dopant number variability in present nanoscale devices and for exploiting single...

Ternary logic implemented on a single dopant atom field effect silicon transistor

We provide an experimental proof of principle for a ternary multiplier realized in terms of the charge state of a single dopant atom embedded in a fin field effect transistor (Fin-FET). Robust reading of the logic output is made possible by using two channels to measure the current flowing through the device and the transconductance. A read out...