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Announcing TU Delft Repository replacement
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2 July 2024
TU Delft Repository will be replaced with a fresh user friendly design with monthly new feature releases.
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(1 - 16 of 16)
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Test and Diagnosis of Hard-to-Detect Faults in FinFET SRAMs
Defects, Fault Modeling, and Test Development Framework for RRAMs
Hierarchical Memory Diagnosis
PVT Analysis for RRAM and STT-MRAM-based Logic Computation-in-Memory
Improving the Detection of Undefined State Faults in FinFET SRAMs
Evaluation of Single Event Upset Susceptibility of FinFET-based SRAMs with Weak Resistive Defects
Intermittent Undefined State Fault in RRAMs
Detecting Random Read Faults to Reduce Test Escapes in FinFET SRAMs
Hard-to-Detect Fault Analysis in FinFET SRAMs
Modeling Soft-Error Reliability Under Variability
Evaluating the Impact of Ionizing Particles on FinFET -based SRAMs with Weak Resistive Defects
A DFT Scheme to Improve Coverage of Hard-to-Detect Faults in FinFET SRAMs
Defect and Fault Modeling Framework for STT-MRAM Testing
Device-Aware Test: A New Test Approach Towards DPPB Level
DFT Scheme for Hard-to-Detect Faults in FinFET SRAMs
A defect-oriented test approach using on-Chip current sensors for resistive defects in FinFET SRAMs
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