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Ishihara, R. (author), Zhang, J. (author), Trifunovic, M. (author), Derakhshandeh Kheljani, J. (author), Golshani, N. (author), Tajari Mofrad, M.R. (author), Chen, T. (author), Beenakker, C.I.M. (author), Shimoda, T. (author)
We review our recent achievements in monolithic 3D-ICs and flexible electronics based on single-grain Si TFTs that are fabricated inside a single-grain with a low-temperature process. Based on pulsed-laser crystallization and submicron sized cavities made in the substrate, amorphous-Si precursor film was converted into poly-Si having grains that...
journal article 2014
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Zhang, J. (author), Trifunovic, M. (author), Van der Zwan, M. (author), Takagishi, H. (author), Kawajiri, R. (author), Shimoda, T. (author), Beenakker, C.I.M. (author), Ishihara, R. (author)
Solution process of silicon will provide high-speed transistor fabrication with low-cost by, for example, roll-to-roll process. In this paper, a low-temperature process (350?°C) is reported for fabrication of high-quality Si devices on a polyimide substrate from doctor-blade coated liquid-Si. With this method, different semiconductor devices...
journal article 2013
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Vollebregt, S. (author), Banerjee, S. (author), Beenakker, K. (author), Ishihara, R. (author)
The thermal conductivity of as-grown vertical multi-walled carbon nanotubes (CNT) bundles fabricated at low temperature (500?°C) was measured using a vertical 3?-method. For this, CNT were selectively grown inside an oxide opening and sandwiched between two metal electrodes. The validity of the method was confirmed by both measurements as...
journal article 2013
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Ishihara, R. (author), Zhang, J. (author), Trifunovic, M. (author), Van der Zwan, M. (author), Takagishi, H. (author), Kawajiri, R. (author), Shimoda, T. (author), Beenakker, C.I.M. (author)
Solution process of silicon using liquid-Si is attractive for fabrication of high-speed flexible electronics. We have fabricated single-grain Si TFTs on location-controlled Si grains with longpulse excimer laser crystallization of spin-coated liquid Si film. The maximum grain diameter is 3.5?m, and the mobilities for electrons and holes are...
journal article 2012
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Arslan, A. (author), Kahlert, H.J. (author), Oesterlin, P. (author), Mofrad, D.T. (author), Ishihara, R. (author), Beenakker, C.I.M. (author)
625 nm thick a-Si layer was crystallized by using microsecond pulsed green laser with wavelength of 515 nm. At least 8 ?m size grains were formed using location controlled single grain technique at room temperature. Energy density window for crystallization and ablation were compared for pulse durations of 300 ns, 1000 ns and 1200 ns.
journal article 2012
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Arslan, A. (author), Kahlert, H.J. (author), Oesterlin, P. (author), Mofrad, D.T. (author), Ishihara, R. (author), Beenakker, C.I.M. (author)
conference paper 2012
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Ishihara, R. (author), Zhang, J. (author), Trifunovic, M. (author), Van der Zwan, M. (author), Takagishi, H. (author), Kawajiri, R. (author), Shimoda, T. (author), Beenakker, C.I.M. (author)
conference paper 2012
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Tang, J. (author), Gruber, D. (author), Schelen, J.B.J. (author), Funke, H.J. (author), Beenakker, C.I.M. (author)
Decapsulation of a SOT23 semiconductor package with 23 um copper wire bonds is conducted with an especially designed microwave induced plasma system. It is found that a 30%-60% CF4 addition in the O2/CF4 etchant gas results in high molding compound etching rate. Si3N4 overetching which is encountered in plasma decapsulation is solved by an...
journal article 2012
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Tang, J. (author), Schelen, J.B.J. (author), Beenakker, C.I.M. (author)
Plastic integrated circuit packages with copper wire bonds are decapsulated by a Microwave Induced Plasma system. Improvements on microwave coupling of the system are achieved by frequency tuning and antenna modification. Plasmas with a mixture of O2 and CF4 showed a high etching rate around 2 mm3/min. The role of O2 and CF4 in etching molding...
journal article 2011
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Ishihara, R. (author), Chen, T. (author), Baiano, A. (author), Mofrad, M.R. (author), Beenakker, C.I.M. (author)
We review our recent achievements in location-control of Ge grains and high performance single-grain (SG) Ge thin film transistor (TFT) fabricated inside a Ge grain. Large Ge grains having a grain size of 10 µm were obtained at predetermined positions by the µ-Czochralski process using excimer-laser and sputtered a-Ge layer. TFTs were fabricated...
journal article 2011
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Taouil, M. (author), Hamdioui, S. (author), Beenakker, K. (author), Marinissen, E.J. (author)
One of the key challenges in 3D Stacked-ICs (3D-SIC) is to guarantee high product quality at minimal cost. Quality is mostly determined by the applied tests and cost trade-offs. Testing 3D-SICs is very challenging due to several additional test moments for the mid-bond stacks, i.e., partially created stacks. The key question that this paper...
journal article 2011
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Arslan, A. (author), Ishihara, R. (author), Derakhshandeh, J. (author), Beenakker, C.I.M. (author)
Design, fabrication and measurement results of single grain (SG) lateral PIN photodiodes and SG thin film transistors (TFT) are reported in this paper. Devices were developed to be used in indirect X-ray image sensor pixel design. We have controlled position of 6 ?m x 6 ?m silicon grains with excimer-laser crystallization of a-Si film. Lateral...
conference paper 2011
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Ishihara, R. (author), Chen, T. (author), Van der Zwan, M. (author), He, M. (author), Schellevis, H. (author), Beenakker, K. (author)
Existent flat-panel display is mechanically stiff because it requires external connection of IC chips. At its present stage, displays with a-Si, metal oxide semiconductor or organic TFTs require still external connection of data driver and controllers, because of their low carrier mobilities. We will review our recent progress on direct...
conference paper 2011
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Chen, T. (author), Ishihara, R. (author), Beenakker, K. (author)
In this article, we investigated the high quality SiO2 deposited at 80°C by inductively coupled plasma enhanced chemical vapor deposition (CVD). The interface trap density of 1.48×1010 cm?2 eV?1 and breakdown voltage of 5.6 MV/cm were realized successfully despite the low deposition temperature. Thin film transistors (TFTs) have been fabricated...
journal article 2010
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Ishihara, R. (author), Baiano, A. (author), Chen, T. (author), Derakhshandeh, J. (author), Tajari Mofrad, M.R. (author), Danesh, M. (author), Saputra, N. (author), Long, J. (author), Beenakker, C.I.M. (author)
Single-grain Si TFTs have been fabricated using accurate 2D location control of large Si grain with the ?-Czochralski process. TFTs fabricated inside the crystalline islands of 6 ?m show a mobility (600cm2/Vs) as high as that of the SOI counterpart, despite of the low-temperature (<350oC) process. By applying a tensile stress into the grain, the...
journal article 2009
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Chen, T. (author), Ishihara, R. (author), Beenakker, C.I.M. (author)
journal article 2008
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Matsuki, N. (author), Ishihara, R. (author), Baiano, A. (author), Beenakker, C.I.M. (author)
We used scanning capacitance microscopy (SCM) to investigate the electrical activity of grain boundaries consisting of random and coincidence-site-lattice (CSL) boundaries in location-controlled silicon islands, which were fabricated using the ?-Czochralski process with an excimer laser. The SCM results suggest that the electrical activity of...
journal article 2008
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Baiano, A. (author), Ishihara, R. (author), Saputra, N. (author), Long, J. (author), Karaki, N. (author), Inoue, S. (author), Metselaar, W. (author), Beenakker, C.I.M. (author)
Single Grain Thin-film transistors (SG-TFTs) fabricated inside a location-controlled grain by µ-Czochralski process have as high as SOI performance. To model them, BSIMSOI with a proper modification of the mobility is proposed. The model has been verified for n- and p-channel DC and low frequency AC conditions by comparison with measurement...
journal article 2007
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He, M. (author), Ishihara, R. (author), Metselaar, W. (author), Beenakker, C.I.M. (author)
Clear preference of <100>- orientation in self-assembled poly- Si is observed for the first time not only in surface, but also in-plane orientations. This textured poly-Si can be used for TFT active channel, expecting a high performance with an excellent uniformity; or can be used as a seed layer for orientation controlling.
journal article 2006
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He, M. (author), Ishihara, R. (author), Metselaar, W. (author), Beenakker, K. (author)
journal article 2006
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