Digitally Intensive Frequency Synthesis and Modulation Exploiting a Time-mode Arithmetic Unit

Determining clock errors of ocean-bottom seismometers: an ambient-noise based method designed for large-scale ocean bottom deployments

Mapping of the gene network that regulates glycan clock of ageing

Asynchronous Hyperbolic UWB Source-Localization and Self-Localization for Indoor Tracking and Navigation

Recent advances and perspectives in GNSS PPP-RTK

A Low-Spur Fractional-N PLL Based on a Time-Mode Arithmetic Unit

Quality control and clock error correction of passive seismic data from ocean bottom seismometers in the Red Sea

Op tijd schakelen: Catalogus thematentoonstelling binnen de Studieverzameling

A Highly Linear I/Q Interleaving DDRM: A 4GHz Low Power, Highly Linear I/Q Interleaving DDRM in 40nm CMOS Technology

Frequency Augmented Clock Synchronization for Space-based interferometry

A Low-Jitter and Low-Spur Charge-Sampling PLL

An Output Bandwidth Optimized 200-Gb/s PAM-4 100-Gb/s NRZ Transmitter With 5-Tap FFE in 28-nm CMOS

A Wideband IQ-Mapping Direct-Digital RF Modulator for 5G Transmitters

A Crystal-Less Clock Generation Technique for Battery-Free Wireless Systems

A 10Gb/s Cryogenic Clock and Data Recovery System with Low Jitter

A Wideband Four-Way Doherty Bits-In RF-Out CMOS Transmitter

A Compact Transformer-Based Fractional-N ADPLL in 10-nm FinFET CMOS

Design of an ultrasound transceiver asic with a switching-artifact reduction technique for 3D carotid artery imaging

Clock skew invariant beamforming: for a wireless acoustic sensor network

Clock-Offset and Microphone Gain Mismatch Invariant Beamforming