Machine learning on edge devices performs crucial identification or prediction tasks while limiting the amount of data that needs to be transmitted to more centralized computing nodes. However, strict area and energy requirements necessitate specialized hardware developed for the requirements of the device and model. This thesis is concerned with developing an area and energy arithmetic unit as part of the implementation of a stacked machine learning model in embedded automotive devices. The model in question was previously designed to perform lifetime prediction with the goal of improving the reliability of semiconductor devices used in various automotive applications. This thesis aims to achieve area and energy efficiency by exploiting the commonalities in the arithmetic operations of several of the internal learners of the stacked machine learning model. The use of a weighted figure of merit, taking into account area, energy and delay, allow for simple comparisons of designs at any operation frequency and easy insight into the changes in the merit of designs if device requirements were to change. A sweep of the percentage of multiplications in the workload also gave insight into how design choices may change due to future redesigns of the stacked machine learning model. It was found that the MAC, multiply, divide and accumulate operations of the internal learners can best be supported by one arithmetic unit containing a "Reduced Area" parallel multiplier (still taking up most of the area), a small, dedicated accumulator and invariant integer division using the multiplier. It was also found that the ability to reconfigure the multiplier for different levels of bit-precision does not yield performance improvement for the expected precision distribution.

Wireless power transfer has been around for a long time. In 1899 Nikola Tesla demonstrated that it was possible to transfer power using a pair of coils. This technology has advanced to now charge a wide range of portable devices, such as phones. In this thesis, a wireless charging system is designed to be integrated into a power bank with UV-C sterilization to charge phones. The design focuses on creating a small and highly efficient module to transfer energy from the power bank battery to the phone with as little losses as possible. The design adheres to the Qi standard from the Wireless Power Consortium by following the MP-A2 reference design. The design consists of a voltage regulator to provide a constant voltage, a controlled inverter that manages output power, and a series compensated transmitter coil. LTspice simulations predict the power efficiency to be 74% from the battery to the receiver. A prototype PCB was designed and assembled to demonstrate the performance of the design in practice and transferred 5W at an efficiency of 67%. This shows potential for future integration of the design into the power bank.