Multilevel inverters are widely used in industries for higher power applications due to low harmonic pollution and high efficiency. On the other hand, the phase-shift switching technique is well-known for its harmonic mitigation performance. However, phase-shift switching has not been regularly implemented on multilevel inverters due to complexity at a higher number of levels and difficulty in voltage balancing of the auxiliary capacitors in the configuration. In this project, the five-level Packed U-Cell inverter (PUC5) will be investigated to design and implement a phase-shift switching technique with an integrated voltage balancing algorithm. The developed technique will be implemented on the real-time simulator and hardware setup.

A literature review will be done on phase-shift switching algorithms and multilevel inverters. Afterward, a phase-shift switching algorithm with an integrated voltage balancing technique will be developed for the PUC5 inverter and simulated in Simulink. Hardware-in-the-loop (HIL) will be done using Opal-RT devices.