This thesis investigates the performance limits and design challenges of two current-mode front-end concepts that target WiFi and mm-wave 5G applications, respectively. The first concept is a power amplifier (PA), which operates at 2.4GHz and is driven by a direct-digital RF modulator (DDRM). A design for the PA, which also includes a parallel-combining transformer (PCT), was proposed, taped and tested in the QUBiC Gen8 technology of NXP Semiconductors. The measured results yield a peak output power of 27dBm, power efficiency of 20%, and an adjacent channel power ratio (ACPR) of -33.05dBc. In the other concept, the DDRM drives a power mixer (PMIX) which up-converts the DDRM signal to mm-wave frequencies. For the PMIX-based front-end, multiple linearity enhancement techniques were proposed and evaluated using simulations. For both current-mode front-end concepts, an extensive analysis on the theoretical output power and power efficiency limit was performed. Although current-mode operation has a high linearity potential, fully reaching this potential turns out not to be trivial, due to various device non-idealities and imperfect impedance matching.