The focus of this report is the design and implementation of a universal gate driver for half-bridge circuits. This design includes a programmable dead-time controller and adjustable properties to ensure efficient and reliable switching on a variety of high-voltage applications. Furthermore, this work includes a comparative understanding of all design choices, such as the options considered for the dead-time controller, the gate driver component and the circuit of the output phase. The designed system is expected to receive as input a PWM signal and generate two output signals to drive a halfbridge configuration. The output pulses must be generated with a programmable dead-time and at the input switching frequency. The end product of this design will be used in the TU Delft Power Electronics Lab. The specific requirements are determined in order to meet the lab’s needs and this report further describes the process from acquiring the technical requirements, the circuit design, and finally, the prototype evaluation.