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M Bodea

Conference paper (4)

4 records found

1

Compact delay modeling of latch-based threshold logic gates

Conference paper (2002) - MD Padure (author) , Sorin Dan Cotofana (author) , C Dan (author) , S Vassiliadis (author) , M Bodea (author)

A low-power threshold logic family

Conference paper (2002) - MD Padure (author) , Sorin Dan Cotofana (author) , S Vassiliadis (author) , C Dan (author) , M Bodea (author)

A new latch-based threshold logic familiy

Conference paper (2001) - MD Padure (author) , Sorin Dan Cotofana (author) , C Dan (author) , M Bodea (author) , S Vassiliadis (author)

Capacitive threshold logic: a designer perspective

Conference paper (1999) - MD Padure (author) , C Dan (author) , Sorin Dan Cotofana (author) , M Bodea (author) , S Vassiliadis (author)