This work presents a fractional-N digital PLL that employs a supply-resilient, time-amplifying dual-ramp DTC, which offers 8× time amplification and maintains its linearity under supply variations. Additionally, a DTC code-randomization technique is included to enhance the DTC gain-calibration accuracy and convergence speed at near-integer channels. The PLL achieves <-59dBc fractional spurs and 74fs rms jitter for a stable supply and 88.5fs rms jitter for a 29mVrms, 10MHz-bandwidth supply noise.