Wireless biosensors are playing a pivotal role in health monitoring, disease detection and management. The development of wireless biosensor nodes and networks strongly relies on the design of novel low-power, low-cost and flexible CMOS sensor readouts. This brief presents a CMOS potentiostat that integrates a control amplifier, a dual-slope ADC and a wireless unit on the same chip. It implements a novel time-based readout scheme, whereby the counter of the dual-slope ADC is moved to the receiver and the sensor current is encoded in the timing between two wireless pulses transmitted via pulse-harmonic modulation across an inductive link. Measured results show that the potentiostat chip can resolve a minimum input current of 10pA at a sampling frequency of 125 Hz and a power consumption of 12 μW .

Wireless data telemetry for implantable medical devices (IMDs) has, in general, been limited to a few Mbps, and used for applications such as transmitting recordings from an implanted monitoring device, or uploading commands to an implanted stimulator. However, modern neural interfaces need to record high resolution potentials from hundreds of neurons; this requires much higher data rates. While fast wireless communication is possible using existing standards such as WiFi, power consumption demands are far too high for IMDs. Short range inductive link based telemetry, in particular impulse-based systems such as pulse-harmonic modulation (PHM), have demonstrated transfer speeds of up to 20 Mbps with a small power budget. However, these systems require complex and precise circuits, making them potentially susceptible to inter-symbol-interference. This work presents a new method named Short-range Quality-factor Modulation (SQuirM), which retains the low power consumption and high data rate of PHM, while improving the resilience of the system and simplifying the circuit design. Transmitter and receiver circuits were fabricated using 0.35 μm CMOS. The circuits were capable of reliably transceiving data at speeds of up to 50.4 Mbps, with a BER of < 4.5 × 10^-10 , and a transmitter energy consumption of 8.11 pJ/b.

The original paper entitled "Practical Inductive Link Design for Biomedical Wireless Power Transfer: A Tutorial" [1], aimed to provide an accessible review and guide, describing the necessary steps for designing effective biomedical inductive links, without the need for FEM Software. While the majority of the information in this paper is accurate and applicable, some errors in formulas have been brought to the attention of the authors, which could generate erroneous results if used in calculations. The aim of this paper is to highlight and correct these errors. It should be noted that the accompanying software for performing these calculations has also been corrected where necessary, in line with the corrections presented here [2]. The errors largely relate to the equations presented throughout, and are listed below: First, [1, Eq. (2)], defining an approximation for Nagaoka's coefficient, contains erroneous squares and is missing a term in the fraction of the large denominator. The correct form is presented below: Second, [1, Eq. (14)] considers the ac losses of a Litz-wire coil. The original form contains errors of coefficients and signs. The correct formulation is given as follows: (Formula presented). Third, [1, Eq. (17)] is missing a square. The correct form is as follows: Fourth, [1, Eq. (26)], that defines ang, is missing a cos a from the numerator of the top fraction under the square root. The correct form is given below: Finally, the caption of [1, Fig. 17] is in error; it currently refers to coupling coefficient, while it shows Q-factor. It should read as follows: "Changing Q-factor as winding pitch is modified, with respect to frequency.

Short-range, low-power, high data-rate telemetry is an increasingly desirable feature for implantable medical devices (IMDs), and is commonly implemented using an inductive link. Pulse Harmonic Modulation (PHM) provides the desired high data rates and low power consumption, but requires precise pulse timing. This paper presents a modification of PHM, Single-Pulse Harmonic Modulation (SPHM), which offers reduced power consumption and lower implementation complexity. In order to test the SPHM concept, transmitter and receiver circuits were designed in 0.35μm CMOS and simulated. The simulated results suggest that the circuits can transceive data at 50Mb/s, consuming 1.49pJ/b and 2.59pJ/b at the transmitter and receiver respectively, from a 1.2V supply.

Wireless sensing systems are becoming popular in a range of applications, particularly in the case of biomedical circuits and food monitoring systems. A typical wireless sensing system, however, may require considerable complexity to perform the necessary analog to digital conversion and subsequent wireless transmission. Alternatively, in the case of inductive link based systems, large, manually operated impedance analyzers are required. Based on a detailed analysis of the link impedance, this paper proposes a simple method for wireless capacitive sensing through an inductive link that uses a self-oscillator and a frequency counter. The method enables changes in capacitance to be sensed and wirelessly transmitted simultaneously. In order to test the effectiveness of the method, a self-oscillating circuit was designed and fabricated in 0.18 &#x03BC;m CMOS, and combined with an on-chip humidity sensing capacitor. The system was tested in a humidity chamber across a range of 20-90&#x0025;rh. Measured results from the system demonstrate that capacitive changes as small as 28 fF, translating to &lt;2&#x0025;rh, can be resolved, with a power consumption of 1.44 mW.

Point-of-care systems for the detection of infectious diseases are in great demand especially in developing countries. Lateral flow immunoassays are considered ideal biosensors for point-of-care diagnostics due to their numerous advantages. However, to quantify their results a low power, robust electronic reader is needed. A low power CMOS image sensor is presented that can be used in quantitative lateral flow immunoassay readers. It uses a single low power processing capacitive transimpedance amplifier architecture which includes noise cancellation. A chip containing 4 &#x00D7; 64 pixels was fabricated in CMOS 0.35-&#x03BC;m technology. With uniform illumination at 525 nm and 67 frames per second the chip has 1.9 mVrms total output referred noise and a total power consumption of 21 &#x03BC;W. In tests with lateral flow immunoassays the chip detected concentrations of influenza A nucleoprotein from 0.5 ng/mL to 200 ng/mL.

Wireless power transfer systems, particularly those based on inductive coupling, provide an increasingly attractive method to safely deliver power to biomedical implants. Although there exists a large body of literature describing the design of inductive links, it generally focuses on single aspects of the design process. There is a variety of approaches, some analytic, some numerical, each with benefits and drawbacks. As a result, undertaking a link design can be a difficult task, particularly for a newcomer to the subject. This tutorial paper reviews and collects the methods and equations that are required to design an inductive link for biomedical wireless power transfer, with a focus on practicality. It introduces and explains the published methods and principles relevant to all aspects of inductive link design, such that no specific prior knowledge of inductive link design is required. These methods are also combined into a software package (the Coupled Coil Configurator), to further simplify the design process. This software is demonstrated with a design example, to serve as a practical illustration.

A novel pixel architecture for CMOS image sensors is presented. It uses only one amplifier for both integration of the photocurrent and in-pixel noise cancelation, thus minimizing power consumption. The circuit is specifically designed to be used in readout systems for lateral flow immunoassays. In addition a switching technique is introduced enabling the use of column correlated double sampling technique in capacitive transimpedance amplifier pixel architectures without the use of any memory cells. As a result the reset noise which is crucial in these architectures can be suppressed. The circuit has been designed in a 0.35-μm CMOS technology and simulations are presented to show its performance.

Epidural spinal cord electrical stimulation (ESCS) has been used as a means to facilitate locomotor recovery in spinal cord injured humans. Electrode arrays, instead of conventional pairs of electrodes, are necessary to investigate the effect of ESCS at different sites. These usually require a large number of implantedwires,which could lead to infections. This paper presents the design, fabrication and evaluation of a novel flexible active array for ESCS in rats. Three small (1.7 mm2) and thin (100 μm) application specific integrated circuits (ASICs) are embedded in the polydimethylsiloxane-based implant. This arrangement limits the number of communication tracks to three, while ensuring maximum testing versatility by providing independent access to all 12 electrodes in any configuration. Laser-patterned platinum-iridium foil forms the implant’s conductive tracks and electrodes. Double rivet bonds were employed for the dice microassembly. The active electrode array can deliver current pulses (up to 1 mA, 100 pulses per second) and supports interleaved stimulation with independent control of the stimulus parameters for each pulse. The stimulation timing and pulse duration are very versatile. The array was electrically characterized through impedance spectroscopy and voltage transient recordings. A prototype was tested for long term mechanical reliability when subjected to continuous bending. The results revealed no track or bond failure. To the best of the authors’ knowledge, this is the first time that flexible active electrode arrays with embedded electronics suitable for implantation inside the rat’s spinal canal have been proposed, developed and tested in vitro.

We are developing an electrode array for epidural spinal cord stimulation and a thin integrated circuit (IC) is to be embedded in it. This paper focuses on the development and characterization of a manual process for thinning individual IC die and discusses the issues associated with thinning small dice by a manual process. The procedure allows easy and controlled post-separation thinning of small (about 1 mm²) silicon chips by grinding. A systematic approach was followed to characterize the technique and repeatability of the results. With the setup we introduced we were able to control the final thickness of the IC with a standard deviation of 9.2 μm. Although no chemical processing is used, a small grit size film can create smooth surfaces, with roughness comparable to reported values after etching, acting as the so-called 'stress-relief' step. Electrical tests performed on a thinned stimulator output stage IC indicated that no die damage was caused by the procedure. Some issues regarding the integration of thinned ICs on flexible substrates and the reliability of gold ball rivet bonds on the ICs' aluminium pads are also discussed.

We are developing an active implant for epidural spinal cord stimulation. A thin application specific integrated circuit (ASIC) (~80 μm) is to be embedded within it. The laser patterned tracks are electrically and mechanically thermosonically bonded on the ASIC pads using gold ball studs, forming micro-rivets through holes in the foil of the tracks, an interconnection method called electrical rivet bonding, or microflex [1]. In this work, we sought to characterize and optimize the technique, with respect to its bonding strength. The technique is relatively new and, so far, the mechanical strength of the bonds has only been investigated for interconnection on gold tracks. Standard ASICs however, normally come with aluminium pads. We ran a series of pull tests on the bonds between the metal tracks and aluminium ASIC pads. In these tests, we were concerned with the effect of the different parameters on the bond strength, and more specifically the size of the gold balls and the size of the holes in the foil. We recorded the maximum force (stress) before bond failure for different combinations of parameters. Our results indicate that average stress values can vary between 9.6 and 60 cN, depending on the process parameters. Different failure mechanisms have been identified and these are discussed. Overall, we conclude that larger holes provide larger contact areas with the substrate and generally result in stronger bonds, but the right combination of ball and hole sizes, could lead to strong bonds even with smaller holes.

This paper discusses the design of an application-specific integrated circuit (ASIC) suitable for mounting on a multi-electrode array for epidural spinal cord stimulation in rats. The ASIC acts as a demultiplexer, driving 12 electrodes on the array in any configuration. It is capable of routing biphasic constant current pulses of up to 1 mA to high impedance loads (with a maximum output voltage swing of approximately 25 V) and is small enough to be implanted into a rat's spinal column. Communication with its driver is achieved via 3 wires to minimize the number of interconnections. The circuit was implemented in a 0.18-μm high-voltage CMOS technology occupying a core area of 0.36 mm ². Power dissipation is about 110 μW. Post-layout simulations are presented which show the correct operation of the system.

The design of a very small low-power IC driving 16 electrodes in any combination, for testing different epidural stimulation patterns in freely moving rats using a two wire interface is presented. A scheme is proposed, to receive power, data, clocking information and stimulus current pulses from an external source via the two wires. This is achieved by a combination of time multiplexing and pulse width modulation. The architecture of the system is discussed and simulated results of some building blocks are presented.