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M.A. Wahlah
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10 records found
Run-time FPGA testing using hardwired network on chip
Conference paper -
M.A. Wahlah
,
K.G.W. Goossens
3-Tier reconfiguration model for FPGAs using hardwired network on chip
Conference paper -
M.A. Wahlah
,
K.G.W. Goossens
Hardwired NOC infrastructure with integrated configuration and functional architectures
Conference paper -
M.A. Wahlah
,
K.G.W. Goossens
Composable and persistent-state application swapping on FPGAs using hardwired network on chip
Conference paper -
M.A. Wahlah
,
K.G.W. Goossens
A Non-Intrusive Online FPGA Test Scheme Using A Hardwired Network on Chip
Conference paper -
M.A. Wahlah
,
K.G.W. Goossens
Modeling reconfiguration in a FPGA with a hardwired network on chip
Conference paper -
M.A. Wahlah
,
K.G.W. Goossens
PUMA: Placement Unification with Mapping and guaranteed throughput Allocation on an FPGA Using A Hardwired NoC
Conference paper -
M.A. Wahlah
,
K.G.W. Goossens
Hardwired networks on chip in FPGAs to unify functional and configuration interconnects
Conference paper -
K.G.W. Goossens
,
M Bennebroek
,
JY Hur
,
M.A. Wahlah
Field programmable gate arrays with hardwired networks on chip
Doctoral thesis -
M.A. Wahlah
Comparative analysis of soft and hard on-chip interconnects for FPGAs
Journal article -
JY Hur
,
K.G.W. Goossens
,
L. Mhamdi
,
M.A. Wahlah