Field programmable gate arrays with hardwired networks on chip

Comparative analysis of soft and hard on-chip interconnects for FPGAs

A Non-Intrusive Online FPGA Test Scheme Using A Hardwired Network on Chip

PUMA: Placement Unification with Mapping and guaranteed throughput Allocation on an FPGA Using A Hardwired NoC

Composable and persistent-state application swapping on FPGAs using hardwired network on chip

3-Tier reconfiguration model for FPGAs using hardwired network on chip

Modeling reconfiguration in a FPGA with a hardwired network on chip

Run-time FPGA testing using hardwired network on chip

Hardwired networks on chip in FPGAs to unify functional and configuration interconnects

Hardwired NOC infrastructure with integrated configuration and functional architectures