ME
Marvin Exalto
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Brain-computer interfaces of the future will be recorded from tens of thousands of high-density electrodes. This paper presents a neural amplifier for next-generation single-cell resolution BCIs. The amplifier leverages spatial signal correlation to introduce a novel shared DC servo loop to improve area efficiency while maintaining state-of-the-art power efficiency. Post-layout simulations in 40 nm CMOS technology achieve a 50 dB gain in a [0.1-5.2] kHz bandwidth. The amplifier consumes 920 nW and achieves a total input-referred noise of 8 μ Vrms while occupying only 35 μ m × 35 μ m per recording channel.
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Brain-computer interfaces of the future will be recorded from tens of thousands of high-density electrodes. This paper presents a neural amplifier for next-generation single-cell resolution BCIs. The amplifier leverages spatial signal correlation to introduce a novel shared DC servo loop to improve area efficiency while maintaining state-of-the-art power efficiency. Post-layout simulations in 40 nm CMOS technology achieve a 50 dB gain in a [0.1-5.2] kHz bandwidth. The amplifier consumes 920 nW and achieves a total input-referred noise of 8 μ Vrms while occupying only 35 μ m × 35 μ m per recording channel.