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L.P. Prielinger

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3 records found

Journal article (2025) - Pau Escofet, Anabel Ovide, Medina Bandic, Luise Prielinger, Hans Van Someren, Sebastian Feld, Eduard Alarcon, Sergi Abadal, Carmen Almudever
Quantum computing represents a paradigm shift in computation, offering the potential to solve complex problems intractable for classical computers. Although current quantum processors already consist of a few hundred qubits, their scalability remains a significant challenge. Modular quantum computing architectures have emerged as a promising approach to scale up quantum computing systems. This article delves into the critical aspects of distributed multi-core quantum computing, focusing on quantum circuit mapping, a fundamental task to successfully execute quantum algorithms across cores while minimizing inter-core communications. We derive the theoretical bounds on the number of non-local communications needed for random quantum circuits and introduce the Hungarian Qubit Assignment (HQA) algorithm, a multi-core mapping algorithm designed to optimize qubit assignments to cores with the aim of reducing inter-core communications. Our exhaustive evaluation of HQA against state-of-the-art circuit mapping algorithms for modular architectures reveals a 4.9× and 1.6× improvement in terms of execution time and non-local communications, respectively, compared to the best-performing algorithm. HQA emerges as a very promising scalable approach for mapping quantum circuits into multi-core architectures, positioning it as a valuable tool for harnessing the potential of quantum computing at scale. ...
When physical architectures become too complex for analytical study, numerical simulation proves essential to investigate quantum network behavior. Although highly informative, these simulations involve intricate numerical functions without known analytical forms, making traditional optimization techniques that assume continuity, differentiability, or convexity inapplicable. We introduce a more efficient computational framework that employs machine learning models as surrogates for the objective function. We demonstrate the effectiveness of our approach by applying it to three well-known optimization problems in quantum networking: allocating quantum memory across multiple nodes, tuning an experimental parameter in every physical link of a quantum entanglement switch, and finding effective protocol configurations in a large asymmetric quantum network. Our algorithm consistently outperforms Simulated Annealing and Bayesian optimization within the allotted time, improving results by up to 29% and 28%, respectively. Our framework will thus allow for more comprehensive quantum network studies, integrating surrogate-assisted optimization with existing quantum network simulators. ...
Conference paper (2023) - Medina Bandic, Luise Prielinger, Jonas Nublein, Anabel Ovide, Santiago Rodrigo, Hans Van Someren, Gayane Vardoyan, Carmen G. Almudever, Sebastian Feld, More Authors...
Modular quantum computing architectures are a promising alternative to monolithic QPU (Quantum Processing Unit) designs for scaling up quantum devices. They refer to a set of interconnected QPUs or cores consisting of tightly coupled quantum bits that can communicate via quantum-coherent and classical links. In multi-core architectures, it is crucial to minimize the amount of communication between cores when executing an algorithm. Therefore, mapping a quantum circuit onto a modular architecture involves finding an optimal assignment of logical qubits (qubits in the quantum circuit) to different cores with the aim to minimize the number of expensive inter-core operations while adhering to given hardware constraints. In this paper, we propose for the first time a Quadratic Unconstrained Binary Optimization (QUBO) technique to encode the problem and the solution for both qubit allocation and inter-core communication costs in binary decision variables. To this end, the quantum circuit is split into slices, and qubit assignment is formulated as a graph partitioning problem for each circuit slice. The costly inter-core communication is reduced by penalizing inter-core qubit communications. The final solution is obtained by minimizing the overall cost across all circuit slices. To evaluate the effectiveness of our approach, we conduct a detailed analysis using a representative set of benchmarks having a high number of qubits on two different multi-core architectures. Our method showed promising results and performed exceptionally well with very dense and highly-parallelized circuits that require on average 0.78 inter-core communications per two-qubit gate. ...