This paper proposes a power amplifier (PA) correction technique to recover from load mismatch. It utilizes a main PA, two auxiliary PAs, and a coupler. By adjusting the input drive levels of the PAs it can recover the output power and to a great extent the efficiency of the main PA even when exposed to 2:1 VSWR mismatch conditions. When connected to 50O loading, only the main PA is active, for impedances below or above 50 O, besides the main amplifier, one of the auxiliary PAs is also activated. The power generated by the auxiliary PA adds in phase to the output power of the main PA, as such allowing the output power to be constant at the expense of a minor efficiency penalty.

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This article presents an inverted Doherty power amplifier (IDPA) made load insensitive up to 2:1 voltage standing wave ratio (VSWR) across its fractional bandwidth with a very compact wideband impedance sensor embedded in its output power-combining network (OPCN). To correct for load variation, a low-loss tunable resonator (TR) is used to ensure ohmic loads to the main and peaking stages at the center frequency of operation. At off-center frequencies, TR is used to present an ohmic load for the main stage, while a digitally adjustable phase shifter is used to (re)align the main and peaking stage's current summation in the OPCN. For ohmic load deviations, the main and peaking stage supply voltages and input drives are adjusted to maintain the ideal Doherty's output power and efficiency profile related to nominal 50Ω loading across the bandwidth. To implement the control of the formerly mentioned technique, a wideband impedance sensor is proposed, which uses the orthogonality of incident and reflected waves and requires only four peak detectors. As proof of principle, a prototype 850-950-MHz IDPA featuring the proposed correction technique, the impedance sensor, and the control loop has been implemented as a printed circuit board (PCB) demonstrator. Measurement results show that the IDPA can maintain constant output power with a tolerance of only ± 0.2 dB while improving the drain efficiency and linearity across the entire fractional bandwidth (11% ) for a VSWR range of 2:1.

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This paper presents a 40nm CMOS mm-wave 3-way Doherty power amplifier (PA) suitable for 5G mm-wave transmitters. It features a bandwidth-enhanced technique using a compact single-supply balun-first 3-way Doherty combiner. The realized front-end with a core area of 0.77 mm2delivers a peak power/gain of more than 20 dBm/16 dB and a drain efficiency (DE) of better than 15 %/22 %/33 % at 9.5 dB/6 dB/0 dB power back-off across a 24-to-30 GHz band. At 26 GHz, it achieves an EVM/ACLR of -23.5 dB/-29.5 dBc for an 800MHz 64-OFDM signal with 9.8 dBm average output power and a 15 % average DE.

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This paper presents a design procedure for compact lumped-element 3-/4-/5-way Doherty power combiners suitable for mm-wave 5G transmitters. Among them, the 3-way Doherty power combiner is favored due to its low complexity, compact layout, and average drain efficiency at 12 dB power back-off (PBO) when implemented using lossy lumped elements. Based on the metal stack of a 40nm CMOS process, a 3-way Doherty power combiner can provide a simulated passive efficiency of more than 60% at 12 dB PBO and a 10% drain-efficiency bandwidth $(BW_{\mathrm{D}\mathrm{E}10\%})/3\mathrm{d}\mathrm{B}$ power bandwidth $(BW_{3\mathrm{d}\mathrm{B}})$ of 8/15 GHz at 30 GHz.@en

This paper presents a low-loss load-insensitive Doherty power amplifier (DPA) technique. The proposed DPA is insensitive to ohmic load variation by adjusting its supply voltages and input drive of the main and peaking stages in a mirrored approach. Moreover, a low-loss tunable matching network (TMN) is employed to cancel out any reactive part of the load. To validate this technique, a printed circuit board (PCB) based demonstrator consisting of the Doherty PA, a six-port reflectometer, and a tunable shunt resonator have been fabricated. When subjected to a 50 Ω load, at the 1 dB compression point, the DPA delivers an output power of 32.3 dBm with a power gain and peak drain efficiency of 14.6 dB and 61 %, respectively. When the DPA is driven with a pre-distorted 64-QAM 4 MHz signal optimized for the 50 Ω loading condition, it delivers 24.4 dBm at 41 % average drain efficiency, with EVM/ACLR −40.9 dB / −46.9 dBc. Subsequently, when subjected to a 2:1 VSWR over a 0°−360° mismatch trajectory, using the unaltered 50 Ω DPD correction, it is capable of delivering an output power of 24.4 ± 0.1 dBm with a 34–39 % drain efficiency while maintaining an EVM/ACLR better than −32.3 dB / −39.3 dBc for all load conditions.@en

This article presents a low-loss correction technique for a self-healing load-insensitive power amplifier (PA) using a modified two-tap six-port network, wherein the varying (complex) load is first compensated for its unwanted susceptance part, followed by adjustment of the transistor output stage to the ohmic load variation, by modifying its supply voltage and drive level. This two-step approach avoids the high-Q conditions that occur in tunable matching network solutions, which aims to correct for both the real and imaginary load deviations, such as providing lower insertion loss and voltage stress. Next, to facilitate a fully automated load mismatch correction without the need for calibration, a modified two-tap six-port network for impedance detection and control loop approach is proposed. As proof of principle, a prototype 900-MHz class-AB PA featuring the proposed correction technique, as well as, the six-port reflectometer and the control loop, has been implemented as a PCB demonstrator. Measurement results show that the self-healing load-insensitive PA in the events of load mismatch significantly improves the performance and approaches the 50- $\Omega $ performance. On a 2:1 VSWR 360° mismatch trajectory and driven by a 64-QAM 3.86-MHz signal, the PA achieves a linear output power of 22 dBm with only ±0.1-dB variation and better than -45-dBc adjacent channel power ratio (ACPR).

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