This article introduces a single-supply balun-first three-way parallel Doherty power amplifier (PA) tailored for millimeter-wave (mm-wave) fifth-generation (5G) applications. It incorporates a bandwidth enhancement technique that widens the operational frequency range, enhances broadband power back-off (PBO) efficiency, and reduces impedance mismatch between differential PAs. Realized in 40-nm CMOS bulk technology with a core area of 0.77 mm2 , the prototype delivers a saturated power/peak gain surpassing 20 dBm/16 dB, and it demonstrates a drain efficiency (DE) exceeding 15%/22%/33% at 9.5 dB/6 dB/0 dB PBO across a 24–30 GHz band. The proposed mm-wave PA achieves EVM/ACLR values of − 24.3 dB/ − 30.1 dBc for a 1-GHz 64-QAM OFDM signal, operating at an average output power (Pout) of 9.4 dBm with an average DE of 15%. For a 50-MHz 1024-QAM OFDM signal, it achieves an average Pout/DE of 8.6 dBm/12% with EVM/ACLR of − 30 dB/ − 36.3 dBc.@en

This article introduces an N-way chain-weaver balanced power amplifier (PA) for millimeter-wave (mm-wave) phased-array transmitters (TXs). Taking advantage of the proposed combining network, an embedded impedance/power sensor is implemented, which can be utilized for output power regulation, built-in self-test, and load-based performance optimization. The proposed PA architecture offers linearity and gain robustness under the antenna's frequency/time-dependent voltage standing wave ratio (VSWR). In the event of impedance mismatch, the proposed PA provides N different loads equally distributed on the VSWR circle. Consequently, the performance of the PAs is the average of N PAs with N different loads, which makes this structure VSWR resilient. As a proof of concept, an eight-way chain-weaver balanced PA (BPA) is realized in 40-nm bulk CMOS technology, and it delivers 25.19-dBm P _SAT with 16.19% PAE. The proposed PA supports a 2-GHz 64-QAM OFDM signal with 16-dBm average power, achieving -25-dB error vector magnitude (EVM). The average EVM is better than -30.3 dB without digital pre-distortion (DPD) for an "800-MHz 256-QAM OFDM"signal while generating an average output power of 12.17 dBm. The performance of the PA is also evaluated under 1.5:1-3:1 VSWR conditions. The measured small-signal gain variation under VSWR 3:1 is ±0.7 dB. Moreover, assuming any frequency/time-dependent loading condition within the VSWR 3:1 circle, the proposed chain-weaver BPA achieves <2.8° amplitude-to-phase (AM-PM) over 3-GHz bandwidth. Besides, the embedded impedance/power sensor accuracy outperforms the state of the art. The proposed impedance sensor can measure VSWR 3:1 by the maximum angle and magnitude errors of 12.3° and 0.106, respectively.

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This paper presents a 40nm CMOS mm-wave 3-way Doherty power amplifier (PA) suitable for 5G mm-wave transmitters. It features a bandwidth-enhanced technique using a compact single-supply balun-first 3-way Doherty combiner. The realized front-end with a core area of 0.77 mm2delivers a peak power/gain of more than 20 dBm/16 dB and a drain efficiency (DE) of better than 15 %/22 %/33 % at 9.5 dB/6 dB/0 dB power back-off across a 24-to-30 GHz band. At 26 GHz, it achieves an EVM/ACLR of -23.5 dB/-29.5 dBc for an 800MHz 64-OFDM signal with 9.8 dBm average output power and a 15 % average DE.

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This paper presents a design procedure for compact lumped-element 3-/4-/5-way Doherty power combiners suitable for mm-wave 5G transmitters. Among them, the 3-way Doherty power combiner is favored due to its low complexity, compact layout, and average drain efficiency at 12 dB power back-off (PBO) when implemented using lossy lumped elements. Based on the metal stack of a 40nm CMOS process, a 3-way Doherty power combiner can provide a simulated passive efficiency of more than 60% at 12 dB PBO and a 10% drain-efficiency bandwidth $(BW_{\mathrm{D}\mathrm{E}10\%})/3\mathrm{d}\mathrm{B}$ power bandwidth $(BW_{3\mathrm{d}\mathrm{B}})$ of 8/15 GHz at 30 GHz.@en

Line-of-sight millimeter-wave (mm-wave) 5G phased array systems are key solutions to overcome the free-space path loss while providing a multi-Gbit/s data throughput. To realize these systems, nanoscale CMOS technologies should be exploited to enable high integration, compact area, low cost, and high yield. Besides, 5G systems typically employ spectrally efficient complex modulation schemes with high peak-to-average power ratios (PAPRs), which demand the transmitter (TX) power amplifier (PA) to operate in power back-off (PBO), thus degrading its average efficiency. Many techniques such as outphasing [1,2], load-modulated balanced amplifiers (LMBAs) [3–4], and Doherty PAs (DPAs) [5–9] are adopted in mm-wave TXs to enhance efficiency at PBO. Among them, the Doherty is an “RF-in RF-out” PBO efficiency enhancement topology supporting signals with large modulation bandwidth. These mm-wave DPAs are inherently narrowband structures due to employing a lumped-element quarter-wave transmission line (QTL). Thus, the broadband operation is only feasible by increasing the complexity of the Doherty power combiner, compromising with its passive efficiency [7–8]. Also, in these architectures, their optimum PAE at PBO is still narrowband while providing broadband P1dB.@en

Continuous Class F (CCF) power amplifiers (PAs) overcome Class-F PA's disadvantage of narrow bandwidth by relaxing the short-circuit requirement at the 2^nd harmonic while still maintaining 90.7% peak efficiency over the band of interest. This paper proposes four different CCF output networks, with their design procedure, suitable for on-chip implementation in the 2.1-2.7GHz band. The output stage with 2^nd harmonic trap and no RF choke is favoured due to its flat real impedance, low fundamental reactance, and compact layout. Using a 40nm CMOS process, a passive efficiency of 68% at 2.4GHz for this structure is in reach.

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