On-chip output stage design for a continuous class-F power amplifier
Anil Kumaran (TU Delft - Electronics)
Masoud Pashaeifar (TU Delft - Electronics)
M. D'Avino (Catena)
L.C.N. de Vreede (TU Delft - Electronics)
M.S. Alavi (TU Delft - Electronics)
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Abstract
Continuous Class F (CCF) power amplifiers (PAs) overcome Class-F PA's disadvantage of narrow bandwidth by relaxing the short-circuit requirement at the 2nd harmonic while still maintaining 90.7% peak efficiency over the band of interest. This paper proposes four different CCF output networks, with their design procedure, suitable for on-chip implementation in the 2.1-2.7GHz band. The output stage with 2nd harmonic trap and no RF choke is favoured due to its flat real impedance, low fundamental reactance, and compact layout. Using a 40nm CMOS process, a passive efficiency of 68% at 2.4GHz for this structure is in reach.