This paper presents a novel multi-channel stimulation backend with a multi-bit delta-sigma control loop, which enables precise adjustment of the stimulation current through modulation of the supply voltage. This minimizes the overhead voltage of series circuitry to the stimulation load and avoids the associated energy loss. Additionally, to address the bandwidth limitations commonly encountered in battery-less implants, we propose incorporating amplitude and duration scaling of the arbitrary stimulation waveform. The waveform is programmable with 64 7-bit samples and 4 scaling factors per channel, resulting in a minimum of 68% data reduction per channel compared to using the waveform without scaling. The proposed circuits are designed and simulated in 180nm BCD technology occupying a total silicon area of 9mm2. The fully integrated backend has a minimum compliance voltage of 8.5V and features a switched-capacitor multi-output DC-DC converter (MODDC) with pulse-skipping capability, a CMOS-only high-voltage (HV) multiplexer, and a unique HV H-bridge. Programming a sine-wave stimulus with a 4mA amplitude and a duration of 256μs achieved a signal-to-noise ratio of 40dB within a 10kHz bandwidth. For the same waveform, power efficiencies of 94% and 68% were observed without and with MODDC, respectively. Additionally, when programming constant-current stimuli ranging from 0.26mA to 4mA, high efficiencies of 78-97% and 23-79.4% were achieved without and with MODDC, respectively.

This article presents a sub-1 V bipolar junction transistor (BJT)-based temperature sensor that achieves both high accuracy and high energy efficiency. To avoid the extra headroom required by conventional current sources, the sensor’s diode-connected BJTs are biased by precharging sampling capacitors to the supply voltage and then discharging them through the BJTs. This capacitive biasing technique requires little headroom ( ∼ 150 mV), and simultaneously samples the BJTs’ base–emitter voltages. The latter are then applied to a switched-capacitor (SC) ΔΣ ADC to generate a digital representation of temperature. For robust sub-1 V operation and high energy efficiency, the ADC employs auto-zeroed inverter-based integrators. Fabricated in a standard 0.18- μ m CMOS process, the sensor occupies 0.25 mm 2 and consumes 810 nW from a 0.95-V supply at room temperature. It achieves an inaccuracy of ± 0.15 ∘ C (3 σ ) from − 55 ∘ C to 125 ∘ C after a 1-point trim, which is at par with the state-of-the-art. It also achieves a resolution figure of merit (FoM) of 0.34 pJ ⋅ K 2 , which is more than 6 × lower than that of state-of-the-art BJT-based sensors with similar accuracy.